[llvm] [RISCV][MachineCombiner] Add reassociation optimizations for RVV instructions (PR #88307)

[Min-Yih Hsu via llvm-commits]

mshockwave wrote:

> Other than that `definesRegister` comment, looks correct to me. Just some questions about structuring, not sure if they're possible though so feel free to ignore

I think you mentioned in several places that whether we can use `RISCV::getRVVMCOpcode` instead of checking against a list of (reassociable) RVV opcodes. I would like to point out that the table lookup employed by `RISCV::getRVVMCOpcode` is actually not cheap in terms of time complexity (logarithmic, versus nearly constant time for switch-cases of opcodes) if we want to call it on _every_ instructions. I've seen significant compilation time regression when I tried to do a similar thing in another of my projects (we probably ought to use some sort of cache for `RISCV::getRVVMCOpcode` and its friends to really solve this problem). That's why I didn't use `RISCV::getRVVMCOpcode` in the first place, plus there are only two MC opcodes that we support for reassociation and I don't feel like it would justify risking the compilation speed.

https://github.com/llvm/llvm-project/pull/88307