[llvm] [LLVM][AArch64]Use load/store with consecutive registers in SME2 or S… (PR #77665)

[Momchil Velikov via llvm-commits]

momchil-velikov wrote:

> Can you create a function that finds a suitable caller-saved register instead?

But there are no caller-saved predicate registers, are there? `p0-p3` are argument registers and `p4-p15` are callee-saved and we can only use `pn8`-`pn15` anyway.

https://github.com/llvm/llvm-project/pull/77665