[llvm] [RISCV] Codegen support for XCVbi extension (PR #89719)

Liao Chunyu via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 24 02:03:37 PDT 2024


================
@@ -18035,6 +18053,7 @@ RISCVTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
            "ReadCounterWide is only to be used on riscv32");
     return emitReadCounterWidePseudo(MI, BB);
   case RISCV::Select_GPR_Using_CC_GPR:
+  case RISCV::Select_IMM_Using_CC_GPR:
   case RISCV::Select_FPR16_Using_CC_GPR:
----------------
ChunyuLiao wrote:

Deleted the new node. Doesn't seem to have this problem anymore?

https://github.com/llvm/llvm-project/pull/89719


More information about the llvm-commits mailing list