[llvm] [DAG] SelectionDAG.computeKnownBits - add NSW/NUW flags support to ISD::SHL handling (PR #89877)

[via llvm-commits]

https://github.com/zxc12523 created https://github.com/llvm/llvm-project/pull/89877

fix #89414 

>From ea74bf2ac356923965211188f86a46075d736bb9 Mon Sep 17 00:00:00 2001
From: zxc12523 <danzxc910624 at gmail.com>
Date: Wed, 24 Apr 2024 13:57:23 +0800
Subject: [PATCH] feat: add NSW & NUW & ShAmtNonZero

---
 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 0ab5142ab81676..2e1d225052c7de 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -3475,16 +3475,23 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
       Known.Zero.setBitsFrom(1);
     break;
   }
-  case ISD::SHL:
+  case ISD::SHL: {
     Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
     Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
-    Known = KnownBits::shl(Known, Known2);
+
+    bool NUW = Op.getNode()->Flags.hasNoUnsignedWrap();
+    bool NSW = Op.getNode()->Flags.hasNoSignedWrap();
+    
+    bool ShAmtNonZero = Known2.isNonZero();
+
+    Known = KnownBits::shl(Known, Known2, NUW, NSW, ShAmtNonZero);
 
     // Minimum shift low bits are known zero.
     if (const APInt *ShMinAmt =
             getValidMinimumShiftAmountConstant(Op, DemandedElts))
       Known.Zero.setLowBits(ShMinAmt->getZExtValue());
     break;
+  }
   case ISD::SRL:
     Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
     Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);