[llvm] [NFC][MC][AArch64] Do not use else after return in `getRelocType` (PR #89818)
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Tue Apr 23 13:01:42 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-aarch64
Author: Daniil Kovalev (kovdan01)
<details>
<summary>Changes</summary>
After #<!-- -->89563, we do not use else after return in code corresponding to `R_AARCH64_AUTH_ABS64` reloc in `getRelocType`. This patch removes use of else after return in other places in `getRelocType`.
---
Full diff: https://github.com/llvm/llvm-project/pull/89818.diff
1 Files Affected:
- (modified) llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp (+32-45)
``````````diff
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
index abbf20257edcc0..b4c5cde5fd888d 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
@@ -146,8 +146,8 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
"ILP32 8 byte PC relative data "
"relocation not supported (LP64 eqv: PREL64)");
return ELF::R_AARCH64_NONE;
- } else
- return ELF::R_AARCH64_PREL64;
+ }
+ return ELF::R_AARCH64_PREL64;
case AArch64::fixup_aarch64_pcrel_adr_imm21:
if (SymLoc != AArch64MCExpr::VK_ABS)
Ctx.reportError(Fixup.getLoc(),
@@ -162,9 +162,8 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
"invalid fixup for 32-bit pcrel ADRP instruction "
"VK_ABS VK_NC");
return ELF::R_AARCH64_NONE;
- } else {
- return ELF::R_AARCH64_ADR_PREL_PG_HI21_NC;
}
+ return ELF::R_AARCH64_ADR_PREL_PG_HI21_NC;
}
if (SymLoc == AArch64MCExpr::VK_GOT && !IsNC)
return R_CLS(ADR_GOT_PAGE);
@@ -286,14 +285,12 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
return R_CLS(TLSLE_LDST32_TPREL_LO12_NC);
if (SymLoc == AArch64MCExpr::VK_GOT && IsNC) {
- if (IsILP32) {
+ if (IsILP32)
return ELF::R_AARCH64_P32_LD32_GOT_LO12_NC;
- } else {
- Ctx.reportError(Fixup.getLoc(),
- "LP64 4 byte unchecked GOT load/store relocation "
- "not supported (ILP32 eqv: LD32_GOT_LO12_NC");
- return ELF::R_AARCH64_NONE;
- }
+ Ctx.reportError(Fixup.getLoc(),
+ "LP64 4 byte unchecked GOT load/store relocation "
+ "not supported (ILP32 eqv: LD32_GOT_LO12_NC");
+ return ELF::R_AARCH64_NONE;
}
if (SymLoc == AArch64MCExpr::VK_GOT && !IsNC) {
if (IsILP32) {
@@ -309,25 +306,20 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
return ELF::R_AARCH64_NONE;
}
if (SymLoc == AArch64MCExpr::VK_GOTTPREL && IsNC) {
- if (IsILP32) {
+ if (IsILP32)
return ELF::R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC;
- } else {
- Ctx.reportError(Fixup.getLoc(),
- "LP64 32-bit load/store "
- "relocation not supported (ILP32 eqv: "
- "TLSIE_LD32_GOTTPREL_LO12_NC)");
- return ELF::R_AARCH64_NONE;
- }
+ Ctx.reportError(Fixup.getLoc(), "LP64 32-bit load/store "
+ "relocation not supported (ILP32 eqv: "
+ "TLSIE_LD32_GOTTPREL_LO12_NC)");
+ return ELF::R_AARCH64_NONE;
}
if (SymLoc == AArch64MCExpr::VK_TLSDESC && !IsNC) {
- if (IsILP32) {
+ if (IsILP32)
return ELF::R_AARCH64_P32_TLSDESC_LD32_LO12;
- } else {
- Ctx.reportError(Fixup.getLoc(),
- "LP64 4 byte TLSDESC load/store relocation "
- "not supported (ILP32 eqv: TLSDESC_LD64_LO12)");
- return ELF::R_AARCH64_NONE;
- }
+ Ctx.reportError(Fixup.getLoc(),
+ "LP64 4 byte TLSDESC load/store relocation "
+ "not supported (ILP32 eqv: TLSDESC_LD64_LO12)");
+ return ELF::R_AARCH64_NONE;
}
Ctx.reportError(Fixup.getLoc(),
@@ -344,12 +336,11 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
if (AddressLoc == AArch64MCExpr::VK_LO15)
return ELF::R_AARCH64_LD64_GOTPAGE_LO15;
return ELF::R_AARCH64_LD64_GOT_LO12_NC;
- } else {
- Ctx.reportError(Fixup.getLoc(), "ILP32 64-bit load/store "
- "relocation not supported (LP64 eqv: "
- "LD64_GOT_LO12_NC)");
- return ELF::R_AARCH64_NONE;
}
+ Ctx.reportError(Fixup.getLoc(), "ILP32 64-bit load/store "
+ "relocation not supported (LP64 eqv: "
+ "LD64_GOT_LO12_NC)");
+ return ELF::R_AARCH64_NONE;
}
if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
return R_CLS(TLSLD_LDST64_DTPREL_LO12);
@@ -360,24 +351,20 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
return R_CLS(TLSLE_LDST64_TPREL_LO12_NC);
if (SymLoc == AArch64MCExpr::VK_GOTTPREL && IsNC) {
- if (!IsILP32) {
+ if (!IsILP32)
return ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC;
- } else {
- Ctx.reportError(Fixup.getLoc(), "ILP32 64-bit load/store "
- "relocation not supported (LP64 eqv: "
- "TLSIE_LD64_GOTTPREL_LO12_NC)");
- return ELF::R_AARCH64_NONE;
- }
+ Ctx.reportError(Fixup.getLoc(), "ILP32 64-bit load/store "
+ "relocation not supported (LP64 eqv: "
+ "TLSIE_LD64_GOTTPREL_LO12_NC)");
+ return ELF::R_AARCH64_NONE;
}
if (SymLoc == AArch64MCExpr::VK_TLSDESC) {
- if (!IsILP32) {
+ if (!IsILP32)
return ELF::R_AARCH64_TLSDESC_LD64_LO12;
- } else {
- Ctx.reportError(Fixup.getLoc(), "ILP32 64-bit load/store "
- "relocation not supported (LP64 eqv: "
- "TLSDESC_LD64_LO12)");
- return ELF::R_AARCH64_NONE;
- }
+ Ctx.reportError(Fixup.getLoc(), "ILP32 64-bit load/store "
+ "relocation not supported (LP64 eqv: "
+ "TLSDESC_LD64_LO12)");
+ return ELF::R_AARCH64_NONE;
}
Ctx.reportError(Fixup.getLoc(),
"invalid fixup for 64-bit load/store instruction");
``````````
</details>
https://github.com/llvm/llvm-project/pull/89818
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