[llvm] [VPlan] Simplify (X && Y) || (X && !Y) -> X. (PR #89386)

[Florian Hahn via llvm-commits]

fhahn wrote:

Updated after landing https://github.com/llvm/llvm-project/pull/89384. Note that for the logical AND/OR matching, we need to actually check the provided bit width instead of asserting.

https://github.com/llvm/llvm-project/pull/89386