[llvm] [LLVM][AArch64]Use load/store with consecutive registers in SME2 or S… (PR #77665)

[Momchil Velikov via llvm-commits]

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@@ -3219,27 +3252,38 @@ bool AArch64FrameLowering::restoreCalleeSavedRegisters(
 
     unsigned PnReg;
     unsigned PairRegs;
+    AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
     if (RPI.isPaired() && RPI.isScalable()) {
       PairRegs = AArch64::Z0_Z1 + (RPI.Reg1 - AArch64::Z0);
       if (!PtrueCreated) {
         PtrueCreated = true;
-        PnReg = AArch64::PN8;
-        ;
+        PnReg = AFI->getPredicateRegForFillSpill();
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momchil-velikov wrote:

Same for `PnReg` here, it's used uninitialised.

https://github.com/llvm/llvm-project/pull/77665