[llvm] [SelectionDAG] Fold (icmp eq/ne (shift X, C), 0) -> (icmp eq/ne X, 0) (PR #88801)

[Jay Foad via llvm-commits]

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@@ -4516,6 +4516,27 @@ SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
         }
       }
     }
+
+    // Optimize
+    //    (icmp eq/ne (shift N00, N01C), 0) -> (icmp eq/ne N00, 0)
+    // If shift is logical and all shifted out bits are known to be zero, then
+    // the zero'd ness doesnt change and we can omit the shift.
+    // If all shifted out bits are equal to at least one bit that isn't
+    // shifted out, then the zero'd ness doesnt change and we can omit the
+    // shift.
+    if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && C1.isZero() &&
+        N0.hasOneUse() &&
+        (N0.getOpcode() == ISD::SHL || N0.getOpcode() == ISD::SRL)) {
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jayfoad wrote:

Could handle SRA too? Could also look for the "exact" flag before calculating known bits?

https://github.com/llvm/llvm-project/pull/88801