[llvm] [AMDGPU] New intrinsic llvm.amdgcn.pops.exiting.wave.id (PR #89612)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 23 03:06:01 PDT 2024
================
@@ -1865,6 +1870,12 @@ let SubtargetPredicate = isNotGFX9Plus in {
def : GetFPModePat<fpmode_mask_gfx6plus>;
}
+let SubtargetPredicate = isGFX9GFX10 in
+def : GCNPat<
+ (int_amdgcn_pops_exiting_wave_id),
+ (S_MOV_B32_sideeffects (i32 SRC_POPS_EXITING_WAVE_ID))
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jayfoad wrote:
It needs side effects to prevent tablegen from complaining about selecting a side-effecting intrinsic to a non-side-effecting instruction.
https://github.com/llvm/llvm-project/pull/89612
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