[llvm] [DAG] Prevent combination on small negative value for vscale (PR #88108)

[via llvm-commits]

vfdff wrote:

hi @paulwalker-arm, I have a question I'd like to ask.
  -  I tried to add the following pattern to fix this issue as your suggestion, it works fine when it doesn't have option **-mattr=+use-scalar-inc-vl**, but it will block to match the origin pattern with option **-mattr=+use-scalar-inc-vl**, such as the case **@decb_scalar_i32** in file llvm/test/CodeGen/AArch64/sve-vl-arith.ll. Do you have some advice on it? thanks.
```
  let AddedComplexity = 5 in {
    def : Pat<(add GPR64:$op, (vscale (sve_rdvl_imm i32:$imm))),
              (ADDXrs GPR64:$op, (RDVLI_XI $imm), 0)>;
    def : Pat<(add GPR64:$op, (vscale (sve_cnth_imm_neg i32:$imm))),
              (SUBXrs GPR64:$op, (CNTH_XPiI 31, $imm), 0)>;
    def : Pat<(add GPR64:$op, (vscale (sve_cntw_imm_neg i32:$imm))),
              (SUBXrs GPR64:$op, (CNTW_XPiI 31, $imm), 0)>;
    def : Pat<(add GPR64:$op, (vscale (sve_cntd_imm_neg i32:$imm))),
              (SUBXrs GPR64:$op, (CNTD_XPiI 31, $imm), 0)>;

    def : Pat<(add GPR32:$op, (i32 (trunc (vscale (sve_rdvl_imm i32:$imm))))),
              (ADDSWrr GPR32:$op, (EXTRACT_SUBREG (RDVLI_XI $imm), sub_32))>;
    def : Pat<(add GPR32:$op, (i32 (trunc (vscale (sve_cnth_imm_neg i32:$imm))))),
              (SUBSWrr GPR32:$op, (EXTRACT_SUBREG (CNTH_XPiI 31, $imm), sub_32))>;
    def : Pat<(add GPR32:$op, (i32 (trunc (vscale (sve_cntw_imm_neg i32:$imm))))),
              (SUBSWrr GPR32:$op, (EXTRACT_SUBREG (CNTW_XPiI 31, $imm), sub_32))>;
    def : Pat<(add GPR32:$op, (i32 (trunc (vscale (sve_cntd_imm_neg i32:$imm))))),
              (SUBSWrr GPR32:$op, (EXTRACT_SUBREG (CNTD_XPiI 31, $imm), sub_32))>;
  }
```
 - the changes with above patch for case **@decb_scalar_i32**, it doesn't match the origin pattern with `Predicates = [HasSVEorSME, UseScalarIncVL]` https://github.com/llvm/llvm-project/blob/f0cbdd3e352a1d45965be686f48eee51159bb218/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td#L2540
```
 ; CHECK-LABEL: dech_scalar_i32:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    // kill: def $w0 killed $w0 def $x0
-; CHECK-NEXT:    dech x0
-; CHECK-NEXT:    // kill: def $w0 killed $w0 killed $x0
+; CHECK-NEXT:    cnth x8
+; CHECK-NEXT:    sub w0, w0, w8
 ; CHECK-NEXT:    ret
```


https://github.com/llvm/llvm-project/pull/88108