[llvm] [SelectionDAG]: Have isKnownNeverZero treat SRL like division if all else fails (PR #89523)

Jay Foad via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 22 02:43:06 PDT 2024

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jayfoad wrote:

What cases does this handle that were not handled already? Intuitively it seems like `KnownBits::shl(One, Shift)` will not contain any useful information unless we already knew the exact value of `Shift`.

https://github.com/llvm/llvm-project/pull/89523

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