[llvm] [RISCV] Keep AVLReg define instr inside VSETVLInfo (PR #89180)

[Luke Lau via llvm-commits]

================
@@ -478,6 +480,8 @@ class VSETVLIInfo {
     State = AVLIsImm;
   }
 
+  void setAVLDefMI(const MachineInstr *DefMI) { AVLDefMI = DefMI; }
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lukel97 wrote:

Can we go further and remove the `AVLIsReg` state entirely? I think we have the invariant that the AVL should be one of three types: 

- A virtual register where we can get the definition
- X0, which is really just VLMAX
- An immediate

So I was thinking we could make the state something like

```c++
enum : uint8_t {
    Uninitialized,
    AVLIsDef,
    AVLIsVLMAX
    AVLIsImm,
    Unknown,
  } State = Uninitialized;
```

https://github.com/llvm/llvm-project/pull/89180