[llvm] [MIPS]: Rework atomic max/min expand for subword (PR #89575)
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Mon Apr 22 00:01:23 PDT 2024
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git-clang-format --diff 16fed31f440ff7b194cb0f843e46339e28aa7982 9a3055017f442d16daeccd561de7445ae2ab470c -- llvm/lib/Target/Mips/MipsExpandPseudo.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
index 0977f76b75..d33852a04b 100644
--- a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
+++ b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
@@ -483,7 +483,9 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
BuildMI(loopMBB, DL, TII->get(SEOp), StoreVal).addReg(StoreVal);
} else if (STI->hasMips32r2() && IsUnsigned) {
const unsigned OpMask = SEOp == Mips::SEH ? 0xffff : 0xff;
- BuildMI(loopMBB, DL, TII->get(Mips::ANDi), StoreVal).addReg(StoreVal).addImm(OpMask);
+ BuildMI(loopMBB, DL, TII->get(Mips::ANDi), StoreVal)
+ .addReg(StoreVal)
+ .addImm(OpMask);
} else {
const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24;
const unsigned SROp = IsUnsigned ? Mips::SRL : Mips::SRA;
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https://github.com/llvm/llvm-project/pull/89575
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