[llvm] [RISCV][llvm-mca] Use Sched*MC for Zvk MC instructions and add Zvk tests for P600 (PR #89256)

[Michael Maitland via llvm-commits]

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@@ -0,0 +1,176 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-p670 -iterations=1 < %s | FileCheck %s
+
+vsetvli zero, zero, e32, mf8, tu, mu
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michaelmaitland wrote:

My bad, I read `SEW is any value other than 64` as that is what was required, instead of what was reserved.

https://github.com/llvm/llvm-project/pull/89256