[llvm] edbeae3 - [RISCV] Explicitly bail if something modifies VL/VTYPE in doLocalPostpass

[Luke Lau via llvm-commits]

Author: Luke Lau
Date: 2024-04-17T21:30:08+08:00
New Revision: edbeae373489a2e710f328ceba50b4740c738217

URL: https://github.com/llvm/llvm-project/commit/edbeae373489a2e710f328ceba50b4740c738217
DIFF: https://github.com/llvm/llvm-project/commit/edbeae373489a2e710f328ceba50b4740c738217.diff

LOG: [RISCV] Explicitly bail if something modifies VL/VTYPE in doLocalPostpass

If an instruction between MI and NextMI uses VL or VTYPE we demand the
respective fields so as to not clobber them at their uses. But we don't
consider if something might modify VL or VTYPE, and will happily coalesce
two vsetvlis when we need to preserve them.

This fixes this by skipping to the next vsetvli. Demanding the fields isn't
enough, as we need to preserve the VL and VTYPE values even if no fields
are demanded.

In practice this doesn't happen, presumably due to there not being any
instructions that write to VL or VTYPE without reading them. But I noticed
this whilst working on a separate patch and split it out.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
index aab91adbb64be4..fa37d1ccccd737 100644
--- a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
@@ -1538,6 +1538,9 @@ void RISCVInsertVSETVLI::doLocalPostpass(MachineBasicBlock &MBB) {
 
     if (!isVectorConfigInstr(MI)) {
       doUnion(Used, getDemanded(MI, MRI, ST));
+      if (MI.isCall() || MI.isInlineAsm() || MI.modifiesRegister(RISCV::VL) ||
+          MI.modifiesRegister(RISCV::VTYPE))
+        NextMI = nullptr;
       continue;
     }
 

diff  --git a/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir b/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
index d9a87c2cb12a86..e8620c848f8d3d 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
@@ -516,9 +516,10 @@ body:             |
     ; CHECK-LABEL: name: postpass_modify_vl
     ; CHECK: liveins: $x1
     ; CHECK-NEXT: {{  $}}
-    ; CHECK-NEXT: $x0 = PseudoVSETIVLI 3, 216 /* e64, m1, ta, ma */, implicit-def $vl, implicit-def $vtype
+    ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 3, 216 /* e64, m1, ta, ma */, implicit-def $vl, implicit-def $vtype
     ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $vtype
     ; CHECK-NEXT: $vl = COPY $x1
+    ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 3, 216 /* e64, m1, ta, ma */, implicit-def $vl, implicit-def $vtype
     ; CHECK-NEXT: [[PseudoVADD_VV_M1_:%[0-9]+]]:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 3, 6 /* e64 */, 0 /* tu, mu */, implicit $vl, implicit $vtype
     ; CHECK-NEXT: PseudoRET
     dead $x0 = PseudoVSETIVLI 3, 216, implicit-def $vl, implicit-def $vtype