[llvm] [Support][YamlTraits] Add quoting for keys in textual YAML representation (PR #88763)
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llvm-commits at lists.llvm.org
Mon Apr 15 10:35:47 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-support
Author: Jannik Silvanus (jasilvanus)
<details>
<summary>Changes</summary>
The support library contains helpers to parse and emit YAML documents.
In the textual YAML representation, some strings need to be quoted, e.g.
when containing unprintable characters. There are also cases where quoting
isn't strictly necessary, but prevents issues in some cases, for instance strings
consisting of digits only.
We already have such quoting implemented for YAML values.
This patch applies the same quoting to YAML *keys*.
One affected case is output of control registers in AMDGPU Msgpack metadata,
which are printed in a format like this:
```
0x2cca (SPI_SHADER_PGM_RSRC1_ES): 42
```
With this patch, the key is quoted:
```
'0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 42
```
Most test changes come from this pattern.
---
Patch is 47.89 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/88763.diff
35 Files Affected:
- (modified) llvm/include/llvm/Support/YAMLTraits.h (+1)
- (modified) llvm/lib/Support/YAMLTraits.cpp (+43-36)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-callable.ll (+2-2)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-cs.ll (+2-2)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-es.ll (+1-1)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-gs.ll (+1-1)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-hs.ll (+1-1)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-ls.ll (+1-1)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll (+1-1)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll (+22-22)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll (+22-22)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll (+22-22)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-msgpack-es.ll (+1-1)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll (+1-1)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll (+1-1)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll (+29-29)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll (+1-1)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll (+4-4)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll (+2-2)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll (+1-1)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll (+4-4)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-usersgpr-init.ll (+2-2)
- (modified) llvm/test/CodeGen/AMDGPU/amdpal-vs.ll (+1-1)
- (modified) llvm/test/CodeGen/AMDGPU/elf-notes.ll (+2-2)
- (modified) llvm/test/CodeGen/AMDGPU/extra-lds-size.ll (+2-2)
- (modified) llvm/test/CodeGen/AMDGPU/pal-userdata-regs.ll (+6-6)
- (modified) llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll (+4-4)
- (modified) llvm/test/MC/AMDGPU/pal-msgpack.s (+8-8)
- (modified) llvm/test/Transforms/LowerTypeTests/import-unsat.ll (+1-1)
- (modified) llvm/test/Transforms/WholeProgramDevirt/branch-funnel.ll (+3-3)
- (modified) llvm/test/Transforms/WholeProgramDevirt/export-single-impl.ll (+4-4)
- (modified) llvm/test/Transforms/WholeProgramDevirt/export-uniform-ret-val.ll (+1-1)
- (modified) llvm/test/Transforms/WholeProgramDevirt/export-unique-ret-val.ll (+2-2)
- (modified) llvm/test/Transforms/WholeProgramDevirt/export-vcp.ll (+2-2)
- (modified) llvm/test/Transforms/WholeProgramDevirt/import-indir.ll (+5-5)
``````````diff
diff --git a/llvm/include/llvm/Support/YAMLTraits.h b/llvm/include/llvm/Support/YAMLTraits.h
index 3b1f4bad57fcf1..9baf3ffd814bcf 100644
--- a/llvm/include/llvm/Support/YAMLTraits.h
+++ b/llvm/include/llvm/Support/YAMLTraits.h
@@ -1636,6 +1636,7 @@ class Output : public IO {
private:
void output(StringRef s);
+ void output(StringRef, QuotingType);
void outputUpToEndOfLine(StringRef s);
void newLineCheck(bool EmptySequence = false);
void outputNewLine();
diff --git a/llvm/lib/Support/YAMLTraits.cpp b/llvm/lib/Support/YAMLTraits.cpp
index 4aaf59be2ce502..cce01e08abd413 100644
--- a/llvm/lib/Support/YAMLTraits.cpp
+++ b/llvm/lib/Support/YAMLTraits.cpp
@@ -718,40 +718,8 @@ void Output::scalarString(StringRef &S, QuotingType MustQuote) {
outputUpToEndOfLine("''");
return;
}
- if (MustQuote == QuotingType::None) {
- // Only quote if we must.
- outputUpToEndOfLine(S);
- return;
- }
-
- const char *const Quote = MustQuote == QuotingType::Single ? "'" : "\"";
- output(Quote); // Starting quote.
-
- // When using double-quoted strings (and only in that case), non-printable characters may be
- // present, and will be escaped using a variety of unicode-scalar and special short-form
- // escapes. This is handled in yaml::escape.
- if (MustQuote == QuotingType::Double) {
- output(yaml::escape(S, /* EscapePrintable= */ false));
- outputUpToEndOfLine(Quote);
- return;
- }
-
- unsigned i = 0;
- unsigned j = 0;
- unsigned End = S.size();
- const char *Base = S.data();
-
- // When using single-quoted strings, any single quote ' must be doubled to be escaped.
- while (j < End) {
- if (S[j] == '\'') { // Escape quotes.
- output(StringRef(&Base[i], j - i)); // "flush".
- output(StringLiteral("''")); // Print it as ''
- i = j + 1;
- }
- ++j;
- }
- output(StringRef(&Base[i], j - i));
- outputUpToEndOfLine(Quote); // Ending quote.
+ output(S, MustQuote);
+ outputUpToEndOfLine("");
}
void Output::blockScalarString(StringRef &S) {
@@ -801,6 +769,45 @@ void Output::output(StringRef s) {
Out << s;
}
+void Output::output(StringRef S, QuotingType MustQuote) {
+ if (MustQuote == QuotingType::None) {
+ // Only quote if we must.
+ output(S);
+ return;
+ }
+
+ const char *const Quote = MustQuote == QuotingType::Single ? "'" : "\"";
+ output(Quote); // Starting quote.
+
+ // When using double-quoted strings (and only in that case), non-printable
+ // characters may be present, and will be escaped using a variety of
+ // unicode-scalar and special short-form escapes. This is handled in
+ // yaml::escape.
+ if (MustQuote == QuotingType::Double) {
+ output(yaml::escape(S, /* EscapePrintable= */ false));
+ output(Quote);
+ return;
+ }
+
+ unsigned i = 0;
+ unsigned j = 0;
+ unsigned End = S.size();
+ const char *Base = S.data();
+
+ // When using single-quoted strings, any single quote ' must be doubled to be
+ // escaped.
+ while (j < End) {
+ if (S[j] == '\'') { // Escape quotes.
+ output(StringRef(&Base[i], j - i)); // "flush".
+ output(StringLiteral("''")); // Print it as ''
+ i = j + 1;
+ }
+ ++j;
+ }
+ output(StringRef(&Base[i], j - i));
+ output(Quote); // Ending quote.
+}
+
void Output::outputUpToEndOfLine(StringRef s) {
output(s);
if (StateStack.empty() || (!inFlowSeqAnyElement(StateStack.back()) &&
@@ -853,7 +860,7 @@ void Output::newLineCheck(bool EmptySequence) {
}
void Output::paddedKey(StringRef key) {
- output(key);
+ output(key, needsQuotes(key));
output(":");
const char *spaces = " ";
if (key.size() < strlen(spaces))
@@ -872,7 +879,7 @@ void Output::flowKey(StringRef Key) {
Column = ColumnAtMapFlowStart;
output(" ");
}
- output(Key);
+ output(Key, needsQuotes(Key));
output(": ");
}
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-callable.ll b/llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
index b7b2cb22c1b626..9d4f9434aa3146 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
@@ -142,8 +142,8 @@ attributes #0 = { nounwind }
; GCN: amdpal.pipelines:
; GCN-NEXT: - .registers:
-; GCN-NEXT: 0x2e12 (COMPUTE_PGM_RSRC1): 0xaf01ca{{$}}
-; GCN-NEXT: 0x2e13 (COMPUTE_PGM_RSRC2): 0x8001{{$}}
+; GCN-NEXT: '0x2e12 (COMPUTE_PGM_RSRC1)': 0xaf01ca{{$}}
+; GCN-NEXT: '0x2e13 (COMPUTE_PGM_RSRC2)': 0x8001{{$}}
; GCN-NEXT: .shader_functions:
; GCN-NEXT: dynamic_stack:
; GCN-NEXT: .backend_stack_size: 0x10{{$}}
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
index 98aa04f6d26e19..a3fd2a942bc2b6 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
@@ -11,8 +11,8 @@
; GCN-NEXT: .entry_point: cs_amdpal
; GCN-NEXT: .scratch_memory_size: 0
; GCN: .registers:
-; GCN-NEXT: 0x2e12 (COMPUTE_PGM_RSRC1):
-; GCN-NEXT: 0x2e13 (COMPUTE_PGM_RSRC2):
+; GCN-NEXT: '0x2e12 (COMPUTE_PGM_RSRC1)':
+; GCN-NEXT: '0x2e13 (COMPUTE_PGM_RSRC2)':
; GCN-NEXT: ...
; GCN-NEXT: .end_amdgpu_pal_metadata
define amdgpu_cs half @cs_amdpal(half %arg0) {
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-es.ll b/llvm/test/CodeGen/AMDGPU/amdpal-es.ll
index 012b2061756b3e..679e0858819eb1 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-es.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-es.ll
@@ -10,7 +10,7 @@
; GCN-NEXT: .entry_point: es_amdpal
; GCN-NEXT: .scratch_memory_size: 0
; GCN: .registers:
-; GCN-NEXT: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0
+; GCN-NEXT: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0
; GCN-NEXT: ...
; GCN-NEXT: .end_amdgpu_pal_metadata
define amdgpu_es half @es_amdpal(half %arg0) {
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-gs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
index e2f67398d18a90..75f7a1dc266d3c 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
@@ -11,7 +11,7 @@
; GCN-NEXT: .entry_point: gs_amdpal
; GCN-NEXT: .scratch_memory_size: 0
; GCN: .registers:
-; GCN-NEXT: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0
+; GCN-NEXT: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0
; GCN-NEXT: ...
; GCN-NEXT: .end_amdgpu_pal_metadata
define amdgpu_gs half @gs_amdpal(half %arg0) {
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-hs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
index 9ad47c1d604f26..c61578a967b62f 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
@@ -11,7 +11,7 @@
; GCN-NEXT: .entry_point: hs_amdpal
; GCN-NEXT: .scratch_memory_size: 0
; GCN: .registers:
-; GCN-NEXT: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0
+; GCN-NEXT: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0
; GCN-NEXT: ...
; GCN-NEXT: .end_amdgpu_pal_metadata
define amdgpu_hs half @hs_amdpal(half %arg0) {
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-ls.ll b/llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
index 8ee6f7283ce709..8162c824dc2ce3 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
@@ -10,7 +10,7 @@
; GCN-NEXT: .entry_point: ls_amdpal
; GCN-NEXT: .scratch_memory_size: 0
; GCN: .registers:
-; GCN-NEXT: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0
+; GCN-NEXT: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0
; GCN-NEXT: ...
; GCN-NEXT: .end_amdgpu_pal_metadata
define amdgpu_ls half @ls_amdpal(half %arg0) {
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll
index 0d0c70c38aceb2..5e21ba494df12f 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll
@@ -5,7 +5,7 @@
; amdpal compute shader: check for 0x2e12 (COMPUTE_PGM_RSRC1) in pal metadata
; GCN-LABEL: {{^}}cs_amdpal:
; GCN: .amdgpu_pal_metadata
-; GCN: 0x2e12 (COMPUTE_PGM_RSRC1)
+; GCN: '0x2e12 (COMPUTE_PGM_RSRC1)'
define amdgpu_cs half @cs_amdpal(half %arg0) {
%add = fadd half %arg0, 1.0
ret half %add
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll
index b82e3ebdde4b59..dc9a33ac01412b 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll
@@ -3,45 +3,45 @@
; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 -enable-var-scope %s
; amdpal compute shader: check for 0x2e12 (COMPUTE_PGM_RSRC1) in pal metadata
-; SI-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0x2f0000{{$}}
-; VI-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0x2f02c0{{$}}
-; GFX9-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0x2f0000{{$}}
+; SI-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x2f0000{{$}}
+; VI-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x2f02c0{{$}}
+; GFX9-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x2f0000{{$}}
define amdgpu_cs half @cs_amdpal(half %arg0) {
%add = fadd half %arg0, 1.0
ret half %add
}
; amdpal evaluation shader: check for 0x2cca (SPI_SHADER_PGM_RSRC1_ES) in pal metadata
-; SI-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0x2f0000{{$}}
-; VI-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0x2f02c0{{$}}
-; GFX9-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0x2f0000{{$}}
+; SI-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0x2f0000{{$}}
+; VI-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0x2f02c0{{$}}
+; GFX9-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0x2f0000{{$}}
define amdgpu_es half @es_amdpal(half %arg0) {
%add = fadd half %arg0, 1.0
ret half %add
}
; amdpal geometry shader: check for 0x2c8a (SPI_SHADER_PGM_RSRC1_GS) in pal metadata
-; SI-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0x2f0000{{$}}
-; VI-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0x2f02c0{{$}}
-; GFX9-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0x2f0000{{$}}
+; SI-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0x2f0000{{$}}
+; VI-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0x2f02c0{{$}}
+; GFX9-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0x2f0000{{$}}
define amdgpu_gs half @gs_amdpal(half %arg0) {
%add = fadd half %arg0, 1.0
ret half %add
}
; amdpal hull shader: check for 0x2d0a (SPI_SHADER_PGM_RSRC1_HS) in pal metadata
-; SI-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0x2f0000{{$}}
-; VI-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0x2f02c0{{$}}
-; GFX9-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0x2f0000{{$}}
+; SI-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0x2f0000{{$}}
+; VI-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0x2f02c0{{$}}
+; GFX9-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0x2f0000{{$}}
define amdgpu_hs half @hs_amdpal(half %arg0) {
%add = fadd half %arg0, 1.0
ret half %add
}
; amdpal load shader: check for 0x2d4a (SPI_SHADER_PGM_RSRC1_LS) in pal metadata
-; SI-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0x2f0000{{$}}
-; VI-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0x2f02c0{{$}}
-; GFX9-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0x2f0000{{$}}
+; SI-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0x2f0000{{$}}
+; VI-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0x2f02c0{{$}}
+; GFX9-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0x2f0000{{$}}
define amdgpu_ls half @ls_amdpal(half %arg0) {
%add = fadd half %arg0, 1.0
ret half %add
@@ -49,18 +49,18 @@ define amdgpu_ls half @ls_amdpal(half %arg0) {
; amdpal pixel shader: check for 0x2c0a (SPI_SHADER_PGM_RSRC1_PS) in pal metadata
; below.
-; SI-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0x2f0000{{$}}
-; VI-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0x2f02c0{{$}}
-; GFX9-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0x2f0000{{$}}
+; SI-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0x2f0000{{$}}
+; VI-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0x2f02c0{{$}}
+; GFX9-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0x2f0000{{$}}
define amdgpu_ps half @ps_amdpal(half %arg0) {
%add = fadd half %arg0, 1.0
ret half %add
}
; amdpal vertex shader: check for 45352 (SPI_SHADER_PGM_RSRC1_VS) in pal metadata
-; SI-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0x2f0000{{$}}
-; VI-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0x2f02c0{{$}}
-; GFX9-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0x2f0000{{$}}
+; SI-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0x2f0000{{$}}
+; VI-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0x2f02c0{{$}}
+; GFX9-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0x2f0000{{$}}
define amdgpu_vs half @vs_amdpal(half %arg0) {
%add = fadd half %arg0, 1.0
ret half %add
@@ -75,7 +75,7 @@ define amdgpu_vs half @vs_amdpal(half %arg0) {
; - 0x123456789abcdef0
; - 0xfedcba9876543210
; .registers:
-; 0x2c0b (SPI_SHADER_PGM_RSRC2_PS): 0x42000000
+; '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x42000000
; ...
; .end_amdgpu_pal_metadata
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll
index b86b428680059e..ffce3ed0850920 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll
@@ -3,45 +3,45 @@
; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 -enable-var-scope %s
; amdpal compute shader: check for 0x2e12 (COMPUTE_PGM_RSRC1) in pal metadata
-; SI-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0x2c0000{{$}}
-; VI-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0x2c02c0{{$}}
-; GFX9-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0x2c0000{{$}}
+; SI-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x2c0000{{$}}
+; VI-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x2c02c0{{$}}
+; GFX9-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x2c0000{{$}}
define amdgpu_cs half @cs_amdpal(half %arg0) #0 {
%add = fadd half %arg0, 1.0
ret half %add
}
; amdpal evaluation shader: check for 0x2cca (SPI_SHADER_PGM_RSRC1_ES) in pal metadata
-; SI-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0x2c0000{{$}}
-; VI-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0x2c02c0{{$}}
-; GFX9-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0x2c0000{{$}}
+; SI-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0x2c0000{{$}}
+; VI-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0x2c02c0{{$}}
+; GFX9-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0x2c0000{{$}}
define amdgpu_es half @es_amdpal(half %arg0) #0 {
%add = fadd half %arg0, 1.0
ret half %add
}
; amdpal geometry shader: check for 0x2c8a (SPI_SHADER_PGM_RSRC1_GS) in pal metadata
-; SI-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0x2c0000{{$}}
-; VI-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0x2c02c0{{$}}
-; GFX9-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0x2c0000{{$}}
+; SI-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0x2c0000{{$}}
+; VI-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0x2c02c0{{$}}
+; GFX9-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0x2c0000{{$}}
define amdgpu_gs half @gs_amdpal(half %arg0) #0 {
%add = fadd half %arg0, 1.0
ret half %add
}
; amdpal hull shader: check for 0x2d0a (SPI_SHADER_PGM_RSRC1_HS) in pal metadata
-; SI-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0x2c0000{{$}}
-; VI-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0x2c02c0{{$}}
-; GFX9-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0x2c0000{{$}}
+; SI-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0x2c0000{{$}}
+; VI-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0x2c02c0{{$}}
+; GFX9-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0x2c0000{{$}}
define amdgpu_hs half @hs_amdpal(half %arg0) #0 {
%add = fadd half %arg0, 1.0
ret half %add
}
; amdpal load shader: check for 0x2d4a (SPI_SHADER_PGM_RSRC1_LS) in pal metadata
-; SI-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0x2c0000{{$}}
-; VI-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0x2c02c0{{$}}
-; GFX9-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0x2c0000{{$}}
+; SI-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0x2c0000{{$}}
+; VI-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0x2c02c0{{$}}
+; GFX9-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0x2c0000{{$}}
define amdgpu_ls half @ls_amdpal(half %arg0) #0 {
%add = fadd half %arg0, 1.0
ret half %add
@@ -49,18 +49,18 @@ define amdgpu_ls half @ls_amdpal(half %arg0) #0 {
; amdpal pixel shader: check for 0x2c0a (SPI_SHADER_PGM_RSRC1_PS) in pal metadata
; below.
-; SI-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0x2c0000{{$}}
-; VI-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0x2c02c0{{$}}
-; GFX9-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0x2c0000{{$}}
+; SI-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0x2c0000{{$}}
+; VI-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0x2c02c0{{$}}
+; GFX9-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0x2c0000{{$}}
define amdgpu_ps half @ps_amdpal(half %arg0) #0 {
%add = fadd half %arg0, 1.0
ret half %add
}
; amdpal vertex shader: check for 45352 (SPI_SHADER_PGM_RSRC1_VS) in pal metadata
-; SI-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0x2c0000{{$}}
-; VI-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0x2c02c0{{$}}
-; GFX9-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0x2c0000{{$}}
+; SI-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0x2c0000{{$}}
+; VI-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0x2c02c0{{$}}
+; GFX9-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0x2c0000{{$}}
define amdgpu_vs half @vs_amdpal(half %arg0) #0 {
%add = fadd half %arg0, 1.0
ret half %add
@@ -77,7 +77,7 @@ attributes #0 = { "denormal-fp-math-f32"="preserve-sign,preserve-sign" }
; - 0x123456789abcdef0
; - 0xfedcba9876543210
; .registers:
-; 0x2c0b (SPI_SHADER_PGM_RSRC2_PS): 0x42000000
+; '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x42000000
; ...
; .end_amdgpu_pal_metadata
diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll
index b1db7aafacab0b..3ea3064fa74378 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll
@@ -3,45 +3,45 @@
; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 -enable-var-scope %s
; amdpal compute shader: check for 0x2e12 (COMPUTE_PGM_RSRC1) in pal metadata
-; SI-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0xf0000{{$}}
-; VI-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0xf02c0{{$}}
-; GFX9-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0xf0000{{$}}
+; SI-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0xf0000{{$}}
+; VI-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0xf02c0{{$}}
+; GFX9-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0xf0000{{$}}
define amdgpu_cs half @cs_amdpal(half %arg0) #0 {
%add = fadd half %arg0, 1.0
ret half %add
}
; amdpal evaluation shader: check for 0x2cca (SPI_SHADER_PGM_RSRC1_ES) in pal metadata
-; SI-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0xf0000{{$}}
-; VI-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0xf02c0{{$}}
-; GFX9-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0xf0000{{$}}
+; SI-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0xf0000{{$}}
+; VI-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0xf02c0{{$}}
+; GFX9-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0xf0000{{$}}
define amdgpu_es half @es_amdpal(half %arg0) #0 {
%add = fadd half %arg0, 1.0
ret half %add
}
; amdpal geometry shader: check for 0x2c8a (SPI_SHADER_PGM_RSRC1_GS) in pal metadata
-; SI-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0xf0000{{$}}
-; VI-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0xf02c0{{$}}
-; GFX9-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0xf0000{{$}}
+; SI-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0xf0000{{$}}
+; VI-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0xf02c0{{$}}
+; GFX9-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0xf0000{{$}}
define amdgpu_gs half @gs_amdpal(half %arg0) #0 {
%add = fadd half %arg0, 1.0
ret half %add
}
; amdpal hull shader: check for 0x2d0a (SPI_SHADER_PGM_RSRC1_HS) in pal metadata
-; SI-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0xf0000{{$}}
-; VI-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0xf02c0{{$}}
-; GFX9-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0xf0000{{$}}
+; SI-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0xf0000{{$}}
+; VI-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0xf02c0{{$}}
+; GFX9-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0xf0000{{$}}
define amdgpu_hs half @hs_amdpal(half %arg0) #0 {
%add = fadd half %arg0, 1.0
ret half %add
}
; amdpal load shader: check for 0x2d4a (SPI_SHADER_PGM_RSRC1_LS) in pal metadata
-; SI-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0xf0000{{$}}
-; VI-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0xf02c0{{$}}
-; GFX9-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0xf0000{{$}}
+; SI-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0xf0000{{$}}
+; VI-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0xf02c0{{$}}
+; GFX9-...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/88763
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