[llvm] [PowerPC] Spill non-volatile registers required for traceback table (PR #71115)

[Chen Zheng via llvm-commits]

================
@@ -20,33 +21,66 @@ liveins:
 body:             |
   bb.0.entry:
     liveins: $x3
+    ; SAVEONE-LABEL: name: CRAllSave
+    ; SAVEONE: liveins: $x3, $x29, $cr2, $cr4
+    ; SAVEONE-NEXT: {{  $}}
+    ; SAVEONE-NEXT: $x12 = MFCR8 implicit killed $cr2, implicit killed $cr4
+    ; SAVEONE-NEXT: STW8 killed $x12, 8, $x1
+    ; SAVEONE-NEXT: STD killed $x29, -24, $x1 :: (store (s64) into %fixed-stack.0)
+    ; SAVEONE-NEXT: renamable $x29 = ANDI8_rec killed renamable $x3, 1, implicit-def dead $cr0, implicit-def $cr0gt
+    ; SAVEONE-NEXT: renamable $cr2lt = COPY $cr0gt
+    ; SAVEONE-NEXT: renamable $cr4lt = COPY $cr0gt
+    ; SAVEONE-NEXT: renamable $x3 = COPY $x29
+    ; SAVEONE-NEXT: $x29 = LD -24, $x1 :: (load (s64) from %fixed-stack.0)
+    ; SAVEONE-NEXT: $x12 = LWZ8 8, $x1
+    ; SAVEONE-NEXT: $cr2 = MTOCRF8 $x12
+    ; SAVEONE-NEXT: $cr4 = MTOCRF8 killed $x12
+    ; SAVEONE-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
+    ;
+    ; SAVEALL-LABEL: name: CRAllSave
+    ; SAVEALL: liveins: $x3, $x29, $cr2, $cr4
+    ; SAVEALL-NEXT: {{  $}}
+    ; SAVEALL-NEXT: $x12 = MFCR8 implicit killed $cr2, implicit killed $cr4
+    ; SAVEALL-NEXT: STW8 killed $x12, 8, $x1
+    ; SAVEALL-NEXT: STD killed $x29, -24, $x1 :: (store (s64) into %fixed-stack.0)
+    ; SAVEALL-NEXT: renamable $x29 = ANDI8_rec killed renamable $x3, 1, implicit-def dead $cr0, implicit-def $cr0gt
+    ; SAVEALL-NEXT: renamable $cr2lt = COPY $cr0gt
+    ; SAVEALL-NEXT: renamable $cr4lt = COPY $cr0gt
+    ; SAVEALL-NEXT: renamable $x3 = COPY $x29
+    ; SAVEALL-NEXT: $x29 = LD -24, $x1 :: (load (s64) from %fixed-stack.0)
+    ; SAVEALL-NEXT: $x12 = LWZ8 8, $x1
+    ; SAVEALL-NEXT: $cr2 = MTOCRF8 $x12
+    ; SAVEALL-NEXT: $cr4 = MTOCRF8 killed $x12
+    ; SAVEALL-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
+    ;
+    ; SAVEALL-AIX-LABEL: name: CRAllSave
+    ; SAVEALL-AIX: liveins: $x3, $x29, $x30, $x31, $cr2, $cr4
+    ; SAVEALL-AIX-NEXT: {{  $}}
+    ; SAVEALL-AIX-NEXT: $x12 = MFCR8 implicit killed $cr2, implicit killed $cr4
+    ; SAVEALL-AIX-NEXT: STW8 killed $x12, 8, $x1
+    ; SAVEALL-AIX-NEXT: STD killed $x29, -24, $x1 :: (store (s64) into %fixed-stack.2)
+    ; SAVEALL-AIX-NEXT: STD killed $x30, -16, $x1 :: (store (s64) into %fixed-stack.1, align 16)
+    ; SAVEALL-AIX-NEXT: STD killed $x31, -8, $x1 :: (store (s64) into %fixed-stack.0)
+    ; SAVEALL-AIX-NEXT: renamable $x29 = ANDI8_rec killed renamable $x3, 1, implicit-def dead $cr0, implicit-def $cr0gt
+    ; SAVEALL-AIX-NEXT: renamable $cr2lt = COPY $cr0gt
+    ; SAVEALL-AIX-NEXT: renamable $cr4lt = COPY $cr0gt
+    ; SAVEALL-AIX-NEXT: renamable $x3 = COPY $x29
+    ; SAVEALL-AIX-NEXT: $x31 = LD -8, $x1 :: (load (s64) from %fixed-stack.0)
+    ; SAVEALL-AIX-NEXT: $x30 = LD -16, $x1 :: (load (s64) from %fixed-stack.1, align 16)
+    ; SAVEALL-AIX-NEXT: $x29 = LD -24, $x1 :: (load (s64) from %fixed-stack.2)
+    ; SAVEALL-AIX-NEXT: $x12 = LWZ8 8, $x1
+    ; SAVEALL-AIX-NEXT: $cr2 = MTOCRF8 $x12
+    ; SAVEALL-AIX-NEXT: $cr4 = MTOCRF8 killed $x12
+    ; SAVEALL-AIX-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
----------------
chenzheng1030 wrote:

This case seems for CR non-volatile registers. IIUC, this should not impact by this change, right? If so, maybe we can change the input MIR like what you did for other cases? For example, change the input MIR to:
```
    renamable $x3 = ANDI8_rec killed renamable $x3, 1, implicit-def dead $cr0, implicit-def $cr0gt
    renamable $cr2lt = COPY $cr0gt
    renamable $cr4lt = COPY $cr0gt
    BLR8 implicit $lr8, implicit $rm, implicit $x3
```

Same for the second case.

https://github.com/llvm/llvm-project/pull/71115