[llvm] [DAG] Prevent combination on small negative value for vscale (PR #88108)

[Paul Walker via llvm-commits]

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@@ -3847,6 +3847,8 @@ class TargetLowering : public TargetLoweringBase {
   /// legal.  It is frequently not legal in PIC relocation models.
   virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
 
+  virtual bool isPreferVScaleConst(const APInt Imm) const;
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paulwalker-arm wrote:

I suggest `isPreferredVScaleImm`.

https://github.com/llvm/llvm-project/pull/88108