[llvm] [SLP]Improve minbitwidth analysis for abs/smin/smax/umin/umax intrinsics. (PR #86135)

[Simon Pilgrim via llvm-commits]

================
@@ -7056,14 +7056,11 @@ bool BoUpSLP::areAllUsersVectorized(
 
 static std::pair<InstructionCost, InstructionCost>
 getVectorCallCosts(CallInst *CI, FixedVectorType *VecTy,
-                   TargetTransformInfo *TTI, TargetLibraryInfo *TLI) {
+                   TargetTransformInfo *TTI, TargetLibraryInfo *TLI,
+                   ArrayRef<Type *> VecTys) {
----------------
RKSimon wrote:

(pedantic) Should this be called ArgTys since we're potentially passing scalar ops as well now?

https://github.com/llvm/llvm-project/pull/86135