[llvm] [SLP]Improve minbitwidth analysis for abs/smin/smax/umin/umax intrinsics. (PR #86135)

[Simon Pilgrim via llvm-commits]

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@@ -12546,7 +12561,24 @@ Value *BoUpSLP::vectorizeTree(TreeEntry *E, bool PostponedPHIs) {
 
       Intrinsic::ID ID = getVectorIntrinsicIDForCall(CI, TLI);
 
-      auto VecCallCosts = getVectorCallCosts(CI, VecTy, TTI, TLI);
+      SmallVector<Type *> VecTys;
+      for (auto [Idx, Arg] : enumerate(CI->args())) {
+        if (ID != Intrinsic::not_intrinsic) {
+          if (isVectorIntrinsicWithScalarOpAtArg(ID, Idx)) {
+            VecTys.push_back(Arg->getType());
+            continue;
+          }
+          if (It != MinBWs.end()) {
+            VecTys.push_back(FixedVectorType::get(
+                IntegerType::get(CI->getContext(), It->second.first),
+                VecTy->getNumElements()));
+            continue;
+          }
+        }
+        VecTys.push_back(
+            FixedVectorType::get(Arg->getType(), VecTy->getNumElements()));
+      }
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RKSimon wrote:

Worth converting into a helper to avoid duplication?

https://github.com/llvm/llvm-project/pull/86135