[llvm] [RISCV] Enable expansion mul expansion to shNadd x, (slli x, c) (PR #87105)

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 29 12:05:13 PDT 2024


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@@ -561,8 +562,8 @@ define i64 @add_mul_combine_infinite_loop(i64 %x) {
 ; RV64IMB:       # %bb.0:
 ; RV64IMB-NEXT:    addi a0, a0, 86
 ; RV64IMB-NEXT:    sh1add a0, a0, a0
-; RV64IMB-NEXT:    li a1, -16
-; RV64IMB-NEXT:    sh3add a0, a0, a1
+; RV64IMB-NEXT:    slli a0, a0, 3
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preames wrote:

This seems like a mild regression, but I think only indirectly related to this patch.

https://github.com/llvm/llvm-project/pull/87105


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