[llvm] [AArch64][GISEL] Reduce likelihood of hash collisions for mappings in RegisterBankInfo (PR #87033)

[Matt Arsenault via llvm-commits]

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@@ -332,7 +332,6 @@ RegisterBankInfo::getValueMapping(const PartialMapping *BreakDown,
 template <typename Iterator>
 const RegisterBankInfo::ValueMapping *
 RegisterBankInfo::getOperandsMapping(Iterator Begin, Iterator End) const {
-
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arsenm wrote:

Unrelated change 

https://github.com/llvm/llvm-project/pull/87033