[llvm] [MC][AArch64] Segregate constant pool caches by size. (PR #86832)

Eli Friedman via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 27 10:11:42 PDT 2024


https://github.com/efriedma-quic approved this pull request.

LGTM

If we want to optimize on AArch64 specifically, we could teach the assembler to rewrite `ldr x0, =smallconstant` to `ldr w0, =smallconstant`.  But probably not the effort.

https://github.com/llvm/llvm-project/pull/86832


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