[llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (PR #84965)

[Craig Topper via llvm-commits]

================
@@ -3330,16 +3330,17 @@ LegalizerHelper::LegalizeResult LegalizerHelper::lowerLoad(GAnyLoad &LoadMI) {
   LLT MemTy = MMO.getMemoryType();
   MachineFunction &MF = MIRBuilder.getMF();
 
-  unsigned MemSizeInBits = MemTy.getSizeInBits();
-  unsigned MemStoreSizeInBits = 8 * MemTy.getSizeInBytes();
+  unsigned MinMemSizeInBits = MemTy.getSizeInBits().getKnownMinValue();
+  unsigned MinMemStoreSizeInBits =
----------------
topperc wrote:

You might need to rewrite this as `MemTy.getSizeInBytes() * 8` to use TypeSize. I think I remember that the multiplier has to be on the right hand side for the operator overloading.

https://github.com/llvm/llvm-project/pull/84965