[llvm] [RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (PR #84965)
    Michael Maitland via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Tue Mar 26 11:03:36 PDT 2024
    
    
  
================
@@ -3330,16 +3330,17 @@ LegalizerHelper::LegalizeResult LegalizerHelper::lowerLoad(GAnyLoad &LoadMI) {
   LLT MemTy = MMO.getMemoryType();
   MachineFunction &MF = MIRBuilder.getMF();
 
-  unsigned MemSizeInBits = MemTy.getSizeInBits();
-  unsigned MemStoreSizeInBits = 8 * MemTy.getSizeInBytes();
+  unsigned MinMemSizeInBits = MemTy.getSizeInBits().getKnownMinValue();
----------------
michaelmaitland wrote:
I think we can do this as `TypeSize MemSizeInBits` and `TypeSize MinMemStoreSizeInBits` as Craig Pointed out, which allows us to avoid calling getKnownMinValue. That way we avoid the case comparing fixed vector and scalable vector.
https://github.com/llvm/llvm-project/pull/84965
    
    
More information about the llvm-commits
mailing list