[compiler-rt] [HWASan] [NFC] Align comment to implementation (PR #86362)

[Florian Mayer via llvm-commits]

https://github.com/fmayer created https://github.com/llvm/llvm-project/pull/86362

We consider `shift` between 1 and 7 (exclusive) for `(1 << shift)`, which is equivalent to `2 ** shift`, which means N is [1, 7), not [0, 8).

>From 0570ccc9368a1335246293030d1ad7fcc5b2a598 Mon Sep 17 00:00:00 2001
From: Florian Mayer <fmayer at google.com>
Date: Fri, 22 Mar 2024 16:51:09 -0700
Subject: [PATCH] [HWASan] [NFC] Align comment to implementation

We consider `shift` between 1 and 7 (exclusive) for `(1 << shift)`,
which is equivalent to `2 ** shift`, which means N is [1, 7), not [0, 8).
---
 compiler-rt/lib/hwasan/hwasan_thread_list.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/compiler-rt/lib/hwasan/hwasan_thread_list.h b/compiler-rt/lib/hwasan/hwasan_thread_list.h
index d0eebd1b373a37..4251d7b67b4930 100644
--- a/compiler-rt/lib/hwasan/hwasan_thread_list.h
+++ b/compiler-rt/lib/hwasan/hwasan_thread_list.h
@@ -18,7 +18,7 @@
 // * Start of the shadow memory region is aligned to 2**kShadowBaseAlignment.
 // * All stack ring buffers are located within (2**kShadowBaseAlignment)
 // sized region below and adjacent to the shadow region.
-// * Each ring buffer has a size of (2**N)*4096 where N is in [0, 8), and is
+// * Each ring buffer has a size of (2**N)*4096 where N is in [1, 7), and is
 // aligned to twice its size. The value of N can be different for each buffer.
 //
 // These constrains guarantee that, given an address A of any element of the