[llvm] [RISCV] Add a tune feature to disable stripping W suffix (PR #86255)

[Wang Pengcheng via llvm-commits]

wangpc-pp wrote:

> > > > For some implementations, instructions with W suffix would be less
> > > > costly as they only perform on 32 bits data. Though we may lose some
> > > > chances to compress.
> > > 
> > > 
> > > Do you know of a real implementation where this true?
> > 
> > 
> > Yes, this requirement is from hardware team actually and I didn't notice this stripping W suffix pass before.
> 
> Is that for all 4 instructions(ADDW, ADDIW, SLLIW, MULW) that are in that pass or just MULW?

My intent is for all W instructions, not only multiply. Some low resources/low power consumption scenarios may need this too.

https://github.com/llvm/llvm-project/pull/86255