[llvm] [RISCV] Add a tune feature to disable stripping W suffix (PR #86255)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 22 09:28:38 PDT 2024


topperc wrote:

> > > For some implementations, instructions with W suffix would be less
> > > costly as they only perform on 32 bits data. Though we may lose some
> > > chances to compress.
> > 
> > 
> > Do you know of a real implementation where this true?
> 
> Yes, this requirement is from hardware team actually and I didn't notice this stripping W suffix pass before.

Is that for all 4 instructions(ADDW, ADDIW, SLLIW, MULW) that are in that pass or just MULW?

https://github.com/llvm/llvm-project/pull/86255


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