[llvm] [AArch64][GlobalISel] Take abs scalar codegen closer to SDAG (PR #84886)
Madhur Amilkanthwar via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 15 20:11:36 PDT 2024
================
@@ -3914,8 +3914,12 @@ LegalizerHelper::lower(MachineInstr &MI, unsigned TypeIdx, LLT LowerHintTy) {
case G_SSHLSAT:
case G_USHLSAT:
return lowerShlSat(MI);
- case G_ABS:
+ case G_ABS: {
+ LLT Ty = MRI.getType(MI.getOperand(0).getReg());
+ if (LI.isLegalOrCustom({G_ABS, Ty}))
----------------
madhur13490 wrote:
Found that the assert is triggering for `llvm.abs.i64` case in `AMDGPU/GlobalISel/llvm.abs.ll`. Constraining the lowering to < 8 bytes has no assert. Do you know what might be causing this?
https://github.com/llvm/llvm-project/pull/84886
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