[llvm] [AArch64][GlobalISel] Take abs scalar codegen closer to SDAG (PR #84886)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 15 01:59:15 PDT 2024
================
@@ -3914,8 +3914,12 @@ LegalizerHelper::lower(MachineInstr &MI, unsigned TypeIdx, LLT LowerHintTy) {
case G_SSHLSAT:
case G_USHLSAT:
return lowerShlSat(MI);
- case G_ABS:
+ case G_ABS: {
+ LLT Ty = MRI.getType(MI.getOperand(0).getReg());
+ if (LI.isLegalOrCustom({G_ABS, Ty}))
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arsenm wrote:
Checking for them how?
The specific instruction AArch64 wants to use is only indirectly related
https://github.com/llvm/llvm-project/pull/84886
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