[llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)

[Sander de Smalen via llvm-commits]

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@@ -4821,13 +4821,9 @@ void AArch64InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
     } else if (AArch64::PNRRegClass.hasSubClassEq(RC)) {
       assert((Subtarget.hasSVE2p1() || Subtarget.hasSME2()) &&
              "Unexpected register store without SVE2p1 or SME2");
-      if (SrcReg.isVirtual()) {
-        auto NewSrcReg =
-            MF.getRegInfo().createVirtualRegister(&AArch64::PPRRegClass);
-        BuildMI(MBB, MBBI, DebugLoc(), get(TargetOpcode::COPY), NewSrcReg)
-            .addReg(SrcReg);
-        SrcReg = NewSrcReg;
-      } else
+      if (SrcReg.isVirtual())
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sdesmalen-arm wrote:

Now that you've made the instructions accept both p0-p15 and pn0-pn15, we can remove all the code that tries to handle PNR registers differently from P registers in `storeRegToStackSlot` and `loadRegFromStackSlot`.

https://github.com/llvm/llvm-project/pull/81716