[llvm] [X86] Add missing immediate qualifier to the (V)CMPSS/D instructions (PR #84496)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 8 07:15:19 PST 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-x86
Author: Simon Pilgrim (RKSimon)
<details>
<summary>Changes</summary>
Matches (V)CMPPS/D and makes it easier to algorithmically recreate the instruction name in various analysis scripts I'm working on
---
Patch is 56.51 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/84496.diff
12 Files Affected:
- (modified) llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp (+56-56)
- (modified) llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp (+2-2)
- (modified) llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp (+20-20)
- (modified) llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp (+56-56)
- (modified) llvm/lib/Target/X86/X86FastISel.cpp (+4-4)
- (modified) llvm/lib/Target/X86/X86InstrAVX512.td (+49-49)
- (modified) llvm/lib/Target/X86/X86InstrInfo.cpp (+20-20)
- (modified) llvm/lib/Target/X86/X86InstrSSE.td (+23-23)
- (modified) llvm/lib/Target/X86/X86SchedSapphireRapids.td (+4-4)
- (modified) llvm/test/CodeGen/X86/apx/kmov-domain-assignment.ll (+4-4)
- (modified) llvm/test/CodeGen/X86/domain-reassignment.mir (+123-123)
- (modified) llvm/test/CodeGen/X86/sqrt-fastmath-mir.ll (+4-4)
``````````diff
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
index e96f9279826beb..33104524c5a890 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
@@ -89,12 +89,12 @@ bool X86ATTInstPrinter::printVecCompareInstr(const MCInst *MI,
// Custom print the vector compare instructions to get the immediate
// translated into the mnemonic.
switch (MI->getOpcode()) {
- case X86::CMPPDrmi: case X86::CMPPDrri:
- case X86::CMPPSrmi: case X86::CMPPSrri:
- case X86::CMPSDrm: case X86::CMPSDrr:
- case X86::CMPSDrm_Int: case X86::CMPSDrr_Int:
- case X86::CMPSSrm: case X86::CMPSSrr:
- case X86::CMPSSrm_Int: case X86::CMPSSrr_Int:
+ case X86::CMPPDrmi: case X86::CMPPDrri:
+ case X86::CMPPSrmi: case X86::CMPPSrri:
+ case X86::CMPSDrmi: case X86::CMPSDrri:
+ case X86::CMPSDrmi_Int: case X86::CMPSDrri_Int:
+ case X86::CMPSSrmi: case X86::CMPSSrri:
+ case X86::CMPSSrmi_Int: case X86::CMPSSrri_Int:
if (Imm >= 0 && Imm <= 7) {
OS << '\t';
printCMPMnemonic(MI, /*IsVCMP*/false, OS);
@@ -117,56 +117,56 @@ bool X86ATTInstPrinter::printVecCompareInstr(const MCInst *MI,
}
break;
- case X86::VCMPPDrmi: case X86::VCMPPDrri:
- case X86::VCMPPDYrmi: case X86::VCMPPDYrri:
- case X86::VCMPPDZ128rmi: case X86::VCMPPDZ128rri:
- case X86::VCMPPDZ256rmi: case X86::VCMPPDZ256rri:
- case X86::VCMPPDZrmi: case X86::VCMPPDZrri:
- case X86::VCMPPSrmi: case X86::VCMPPSrri:
- case X86::VCMPPSYrmi: case X86::VCMPPSYrri:
- case X86::VCMPPSZ128rmi: case X86::VCMPPSZ128rri:
- case X86::VCMPPSZ256rmi: case X86::VCMPPSZ256rri:
- case X86::VCMPPSZrmi: case X86::VCMPPSZrri:
- case X86::VCMPSDrm: case X86::VCMPSDrr:
- case X86::VCMPSDZrm: case X86::VCMPSDZrr:
- case X86::VCMPSDrm_Int: case X86::VCMPSDrr_Int:
- case X86::VCMPSDZrm_Int: case X86::VCMPSDZrr_Int:
- case X86::VCMPSSrm: case X86::VCMPSSrr:
- case X86::VCMPSSZrm: case X86::VCMPSSZrr:
- case X86::VCMPSSrm_Int: case X86::VCMPSSrr_Int:
- case X86::VCMPSSZrm_Int: case X86::VCMPSSZrr_Int:
- case X86::VCMPPDZ128rmik: case X86::VCMPPDZ128rrik:
- case X86::VCMPPDZ256rmik: case X86::VCMPPDZ256rrik:
- case X86::VCMPPDZrmik: case X86::VCMPPDZrrik:
- case X86::VCMPPSZ128rmik: case X86::VCMPPSZ128rrik:
- case X86::VCMPPSZ256rmik: case X86::VCMPPSZ256rrik:
- case X86::VCMPPSZrmik: case X86::VCMPPSZrrik:
- case X86::VCMPSDZrm_Intk: case X86::VCMPSDZrr_Intk:
- case X86::VCMPSSZrm_Intk: case X86::VCMPSSZrr_Intk:
- case X86::VCMPPDZ128rmbi: case X86::VCMPPDZ128rmbik:
- case X86::VCMPPDZ256rmbi: case X86::VCMPPDZ256rmbik:
- case X86::VCMPPDZrmbi: case X86::VCMPPDZrmbik:
- case X86::VCMPPSZ128rmbi: case X86::VCMPPSZ128rmbik:
- case X86::VCMPPSZ256rmbi: case X86::VCMPPSZ256rmbik:
- case X86::VCMPPSZrmbi: case X86::VCMPPSZrmbik:
- case X86::VCMPPDZrrib: case X86::VCMPPDZrribk:
- case X86::VCMPPSZrrib: case X86::VCMPPSZrribk:
- case X86::VCMPSDZrrb_Int: case X86::VCMPSDZrrb_Intk:
- case X86::VCMPSSZrrb_Int: case X86::VCMPSSZrrb_Intk:
- case X86::VCMPPHZ128rmi: case X86::VCMPPHZ128rri:
- case X86::VCMPPHZ256rmi: case X86::VCMPPHZ256rri:
- case X86::VCMPPHZrmi: case X86::VCMPPHZrri:
- case X86::VCMPSHZrm: case X86::VCMPSHZrr:
- case X86::VCMPSHZrm_Int: case X86::VCMPSHZrr_Int:
- case X86::VCMPPHZ128rmik: case X86::VCMPPHZ128rrik:
- case X86::VCMPPHZ256rmik: case X86::VCMPPHZ256rrik:
- case X86::VCMPPHZrmik: case X86::VCMPPHZrrik:
- case X86::VCMPSHZrm_Intk: case X86::VCMPSHZrr_Intk:
- case X86::VCMPPHZ128rmbi: case X86::VCMPPHZ128rmbik:
- case X86::VCMPPHZ256rmbi: case X86::VCMPPHZ256rmbik:
- case X86::VCMPPHZrmbi: case X86::VCMPPHZrmbik:
- case X86::VCMPPHZrrib: case X86::VCMPPHZrribk:
- case X86::VCMPSHZrrb_Int: case X86::VCMPSHZrrb_Intk:
+ case X86::VCMPPDrmi: case X86::VCMPPDrri:
+ case X86::VCMPPDYrmi: case X86::VCMPPDYrri:
+ case X86::VCMPPDZ128rmi: case X86::VCMPPDZ128rri:
+ case X86::VCMPPDZ256rmi: case X86::VCMPPDZ256rri:
+ case X86::VCMPPDZrmi: case X86::VCMPPDZrri:
+ case X86::VCMPPSrmi: case X86::VCMPPSrri:
+ case X86::VCMPPSYrmi: case X86::VCMPPSYrri:
+ case X86::VCMPPSZ128rmi: case X86::VCMPPSZ128rri:
+ case X86::VCMPPSZ256rmi: case X86::VCMPPSZ256rri:
+ case X86::VCMPPSZrmi: case X86::VCMPPSZrri:
+ case X86::VCMPSDrmi: case X86::VCMPSDrri:
+ case X86::VCMPSDZrmi: case X86::VCMPSDZrri:
+ case X86::VCMPSDrmi_Int: case X86::VCMPSDrri_Int:
+ case X86::VCMPSDZrmi_Int: case X86::VCMPSDZrri_Int:
+ case X86::VCMPSSrmi: case X86::VCMPSSrri:
+ case X86::VCMPSSZrmi: case X86::VCMPSSZrri:
+ case X86::VCMPSSrmi_Int: case X86::VCMPSSrri_Int:
+ case X86::VCMPSSZrmi_Int: case X86::VCMPSSZrri_Int:
+ case X86::VCMPPDZ128rmik: case X86::VCMPPDZ128rrik:
+ case X86::VCMPPDZ256rmik: case X86::VCMPPDZ256rrik:
+ case X86::VCMPPDZrmik: case X86::VCMPPDZrrik:
+ case X86::VCMPPSZ128rmik: case X86::VCMPPSZ128rrik:
+ case X86::VCMPPSZ256rmik: case X86::VCMPPSZ256rrik:
+ case X86::VCMPPSZrmik: case X86::VCMPPSZrrik:
+ case X86::VCMPSDZrmi_Intk: case X86::VCMPSDZrri_Intk:
+ case X86::VCMPSSZrmi_Intk: case X86::VCMPSSZrri_Intk:
+ case X86::VCMPPDZ128rmbi: case X86::VCMPPDZ128rmbik:
+ case X86::VCMPPDZ256rmbi: case X86::VCMPPDZ256rmbik:
+ case X86::VCMPPDZrmbi: case X86::VCMPPDZrmbik:
+ case X86::VCMPPSZ128rmbi: case X86::VCMPPSZ128rmbik:
+ case X86::VCMPPSZ256rmbi: case X86::VCMPPSZ256rmbik:
+ case X86::VCMPPSZrmbi: case X86::VCMPPSZrmbik:
+ case X86::VCMPPDZrrib: case X86::VCMPPDZrribk:
+ case X86::VCMPPSZrrib: case X86::VCMPPSZrribk:
+ case X86::VCMPSDZrrib_Int: case X86::VCMPSDZrrib_Intk:
+ case X86::VCMPSSZrrib_Int: case X86::VCMPSSZrrib_Intk:
+ case X86::VCMPPHZ128rmi: case X86::VCMPPHZ128rri:
+ case X86::VCMPPHZ256rmi: case X86::VCMPPHZ256rri:
+ case X86::VCMPPHZrmi: case X86::VCMPPHZrri:
+ case X86::VCMPSHZrmi: case X86::VCMPSHZrri:
+ case X86::VCMPSHZrmi_Int: case X86::VCMPSHZrri_Int:
+ case X86::VCMPPHZ128rmik: case X86::VCMPPHZ128rrik:
+ case X86::VCMPPHZ256rmik: case X86::VCMPPHZ256rrik:
+ case X86::VCMPPHZrmik: case X86::VCMPPHZrrik:
+ case X86::VCMPSHZrmi_Intk: case X86::VCMPSHZrri_Intk:
+ case X86::VCMPPHZ128rmbi: case X86::VCMPPHZ128rmbik:
+ case X86::VCMPPHZ256rmbi: case X86::VCMPPHZ256rmbik:
+ case X86::VCMPPHZrmbi: case X86::VCMPPHZrmbik:
+ case X86::VCMPPHZrrib: case X86::VCMPPHZrribk:
+ case X86::VCMPSHZrrib_Int: case X86::VCMPSHZrrib_Intk:
if (Imm >= 0 && Imm <= 31) {
OS << '\t';
printCMPMnemonic(MI, /*IsVCMP*/true, OS);
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp
index 134206466c542f..001a9d4d4d3c1e 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp
@@ -52,8 +52,8 @@ bool X86::optimizeInstFromVEX3ToVEX2(MCInst &MI, const MCInstrDesc &Desc) {
case X86::VCMPPDYrri:
case X86::VCMPPSrri:
case X86::VCMPPSYrri:
- case X86::VCMPSDrr:
- case X86::VCMPSSrr: {
+ case X86::VCMPSDrri:
+ case X86::VCMPSSrri: {
switch (MI.getOperand(3).getImm() & 0x7) {
default:
return false;
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
index fd46e4e1df821a..29a1866bf01ab0 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
@@ -272,24 +272,24 @@ void X86InstPrinterCommon::printCMPMnemonic(const MCInst *MI, bool IsVCmp,
case X86::VCMPPSZrrib: case X86::VCMPPSZrribk:
OS << "ps\t";
break;
- case X86::CMPSDrm: case X86::CMPSDrr:
- case X86::CMPSDrm_Int: case X86::CMPSDrr_Int:
- case X86::VCMPSDrm: case X86::VCMPSDrr:
- case X86::VCMPSDrm_Int: case X86::VCMPSDrr_Int:
- case X86::VCMPSDZrm: case X86::VCMPSDZrr:
- case X86::VCMPSDZrm_Int: case X86::VCMPSDZrr_Int:
- case X86::VCMPSDZrm_Intk: case X86::VCMPSDZrr_Intk:
- case X86::VCMPSDZrrb_Int: case X86::VCMPSDZrrb_Intk:
+ case X86::CMPSDrmi: case X86::CMPSDrri:
+ case X86::CMPSDrmi_Int: case X86::CMPSDrri_Int:
+ case X86::VCMPSDrmi: case X86::VCMPSDrri:
+ case X86::VCMPSDrmi_Int: case X86::VCMPSDrri_Int:
+ case X86::VCMPSDZrmi: case X86::VCMPSDZrri:
+ case X86::VCMPSDZrmi_Int: case X86::VCMPSDZrri_Int:
+ case X86::VCMPSDZrmi_Intk: case X86::VCMPSDZrri_Intk:
+ case X86::VCMPSDZrrib_Int: case X86::VCMPSDZrrib_Intk:
OS << "sd\t";
break;
- case X86::CMPSSrm: case X86::CMPSSrr:
- case X86::CMPSSrm_Int: case X86::CMPSSrr_Int:
- case X86::VCMPSSrm: case X86::VCMPSSrr:
- case X86::VCMPSSrm_Int: case X86::VCMPSSrr_Int:
- case X86::VCMPSSZrm: case X86::VCMPSSZrr:
- case X86::VCMPSSZrm_Int: case X86::VCMPSSZrr_Int:
- case X86::VCMPSSZrm_Intk: case X86::VCMPSSZrr_Intk:
- case X86::VCMPSSZrrb_Int: case X86::VCMPSSZrrb_Intk:
+ case X86::CMPSSrmi: case X86::CMPSSrri:
+ case X86::CMPSSrmi_Int: case X86::CMPSSrri_Int:
+ case X86::VCMPSSrmi: case X86::VCMPSSrri:
+ case X86::VCMPSSrmi_Int: case X86::VCMPSSrri_Int:
+ case X86::VCMPSSZrmi: case X86::VCMPSSZrri:
+ case X86::VCMPSSZrmi_Int: case X86::VCMPSSZrri_Int:
+ case X86::VCMPSSZrmi_Intk: case X86::VCMPSSZrri_Intk:
+ case X86::VCMPSSZrrib_Int: case X86::VCMPSSZrrib_Intk:
OS << "ss\t";
break;
case X86::VCMPPHZ128rmi: case X86::VCMPPHZ128rri:
@@ -304,10 +304,10 @@ void X86InstPrinterCommon::printCMPMnemonic(const MCInst *MI, bool IsVCmp,
case X86::VCMPPHZrrib: case X86::VCMPPHZrribk:
OS << "ph\t";
break;
- case X86::VCMPSHZrm: case X86::VCMPSHZrr:
- case X86::VCMPSHZrm_Int: case X86::VCMPSHZrr_Int:
- case X86::VCMPSHZrrb_Int: case X86::VCMPSHZrrb_Intk:
- case X86::VCMPSHZrm_Intk: case X86::VCMPSHZrr_Intk:
+ case X86::VCMPSHZrmi: case X86::VCMPSHZrri:
+ case X86::VCMPSHZrmi_Int: case X86::VCMPSHZrri_Int:
+ case X86::VCMPSHZrrib_Int: case X86::VCMPSHZrrib_Intk:
+ case X86::VCMPSHZrmi_Intk: case X86::VCMPSHZrri_Intk:
OS << "sh\t";
break;
}
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
index 0705700c78173a..7c8459a546516e 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
@@ -69,12 +69,12 @@ bool X86IntelInstPrinter::printVecCompareInstr(const MCInst *MI, raw_ostream &OS
// Custom print the vector compare instructions to get the immediate
// translated into the mnemonic.
switch (MI->getOpcode()) {
- case X86::CMPPDrmi: case X86::CMPPDrri:
- case X86::CMPPSrmi: case X86::CMPPSrri:
- case X86::CMPSDrm: case X86::CMPSDrr:
- case X86::CMPSDrm_Int: case X86::CMPSDrr_Int:
- case X86::CMPSSrm: case X86::CMPSSrr:
- case X86::CMPSSrm_Int: case X86::CMPSSrr_Int:
+ case X86::CMPPDrmi: case X86::CMPPDrri:
+ case X86::CMPPSrmi: case X86::CMPPSrri:
+ case X86::CMPSDrmi: case X86::CMPSDrri:
+ case X86::CMPSDrmi_Int: case X86::CMPSDrri_Int:
+ case X86::CMPSSrmi: case X86::CMPSSrri:
+ case X86::CMPSSrmi_Int: case X86::CMPSSrri_Int:
if (Imm >= 0 && Imm <= 7) {
OS << '\t';
printCMPMnemonic(MI, /*IsVCMP*/false, OS);
@@ -96,56 +96,56 @@ bool X86IntelInstPrinter::printVecCompareInstr(const MCInst *MI, raw_ostream &OS
}
break;
- case X86::VCMPPDrmi: case X86::VCMPPDrri:
- case X86::VCMPPDYrmi: case X86::VCMPPDYrri:
- case X86::VCMPPDZ128rmi: case X86::VCMPPDZ128rri:
- case X86::VCMPPDZ256rmi: case X86::VCMPPDZ256rri:
- case X86::VCMPPDZrmi: case X86::VCMPPDZrri:
- case X86::VCMPPSrmi: case X86::VCMPPSrri:
- case X86::VCMPPSYrmi: case X86::VCMPPSYrri:
- case X86::VCMPPSZ128rmi: case X86::VCMPPSZ128rri:
- case X86::VCMPPSZ256rmi: case X86::VCMPPSZ256rri:
- case X86::VCMPPSZrmi: case X86::VCMPPSZrri:
- case X86::VCMPSDrm: case X86::VCMPSDrr:
- case X86::VCMPSDZrm: case X86::VCMPSDZrr:
- case X86::VCMPSDrm_Int: case X86::VCMPSDrr_Int:
- case X86::VCMPSDZrm_Int: case X86::VCMPSDZrr_Int:
- case X86::VCMPSSrm: case X86::VCMPSSrr:
- case X86::VCMPSSZrm: case X86::VCMPSSZrr:
- case X86::VCMPSSrm_Int: case X86::VCMPSSrr_Int:
- case X86::VCMPSSZrm_Int: case X86::VCMPSSZrr_Int:
- case X86::VCMPPDZ128rmik: case X86::VCMPPDZ128rrik:
- case X86::VCMPPDZ256rmik: case X86::VCMPPDZ256rrik:
- case X86::VCMPPDZrmik: case X86::VCMPPDZrrik:
- case X86::VCMPPSZ128rmik: case X86::VCMPPSZ128rrik:
- case X86::VCMPPSZ256rmik: case X86::VCMPPSZ256rrik:
- case X86::VCMPPSZrmik: case X86::VCMPPSZrrik:
- case X86::VCMPSDZrm_Intk: case X86::VCMPSDZrr_Intk:
- case X86::VCMPSSZrm_Intk: case X86::VCMPSSZrr_Intk:
- case X86::VCMPPDZ128rmbi: case X86::VCMPPDZ128rmbik:
- case X86::VCMPPDZ256rmbi: case X86::VCMPPDZ256rmbik:
- case X86::VCMPPDZrmbi: case X86::VCMPPDZrmbik:
- case X86::VCMPPSZ128rmbi: case X86::VCMPPSZ128rmbik:
- case X86::VCMPPSZ256rmbi: case X86::VCMPPSZ256rmbik:
- case X86::VCMPPSZrmbi: case X86::VCMPPSZrmbik:
- case X86::VCMPPDZrrib: case X86::VCMPPDZrribk:
- case X86::VCMPPSZrrib: case X86::VCMPPSZrribk:
- case X86::VCMPSDZrrb_Int: case X86::VCMPSDZrrb_Intk:
- case X86::VCMPSSZrrb_Int: case X86::VCMPSSZrrb_Intk:
- case X86::VCMPPHZ128rmi: case X86::VCMPPHZ128rri:
- case X86::VCMPPHZ256rmi: case X86::VCMPPHZ256rri:
- case X86::VCMPPHZrmi: case X86::VCMPPHZrri:
- case X86::VCMPSHZrm: case X86::VCMPSHZrr:
- case X86::VCMPSHZrm_Int: case X86::VCMPSHZrr_Int:
- case X86::VCMPPHZ128rmik: case X86::VCMPPHZ128rrik:
- case X86::VCMPPHZ256rmik: case X86::VCMPPHZ256rrik:
- case X86::VCMPPHZrmik: case X86::VCMPPHZrrik:
- case X86::VCMPSHZrm_Intk: case X86::VCMPSHZrr_Intk:
- case X86::VCMPPHZ128rmbi: case X86::VCMPPHZ128rmbik:
- case X86::VCMPPHZ256rmbi: case X86::VCMPPHZ256rmbik:
- case X86::VCMPPHZrmbi: case X86::VCMPPHZrmbik:
- case X86::VCMPPHZrrib: case X86::VCMPPHZrribk:
- case X86::VCMPSHZrrb_Int: case X86::VCMPSHZrrb_Intk:
+ case X86::VCMPPDrmi: case X86::VCMPPDrri:
+ case X86::VCMPPDYrmi: case X86::VCMPPDYrri:
+ case X86::VCMPPDZ128rmi: case X86::VCMPPDZ128rri:
+ case X86::VCMPPDZ256rmi: case X86::VCMPPDZ256rri:
+ case X86::VCMPPDZrmi: case X86::VCMPPDZrri:
+ case X86::VCMPPSrmi: case X86::VCMPPSrri:
+ case X86::VCMPPSYrmi: case X86::VCMPPSYrri:
+ case X86::VCMPPSZ128rmi: case X86::VCMPPSZ128rri:
+ case X86::VCMPPSZ256rmi: case X86::VCMPPSZ256rri:
+ case X86::VCMPPSZrmi: case X86::VCMPPSZrri:
+ case X86::VCMPSDrmi: case X86::VCMPSDrri:
+ case X86::VCMPSDZrmi: case X86::VCMPSDZrri:
+ case X86::VCMPSDrmi_Int: case X86::VCMPSDrri_Int:
+ case X86::VCMPSDZrmi_Int: case X86::VCMPSDZrri_Int:
+ case X86::VCMPSSrmi: case X86::VCMPSSrri:
+ case X86::VCMPSSZrmi: case X86::VCMPSSZrri:
+ case X86::VCMPSSrmi_Int: case X86::VCMPSSrri_Int:
+ case X86::VCMPSSZrmi_Int: case X86::VCMPSSZrri_Int:
+ case X86::VCMPPDZ128rmik: case X86::VCMPPDZ128rrik:
+ case X86::VCMPPDZ256rmik: case X86::VCMPPDZ256rrik:
+ case X86::VCMPPDZrmik: case X86::VCMPPDZrrik:
+ case X86::VCMPPSZ128rmik: case X86::VCMPPSZ128rrik:
+ case X86::VCMPPSZ256rmik: case X86::VCMPPSZ256rrik:
+ case X86::VCMPPSZrmik: case X86::VCMPPSZrrik:
+ case X86::VCMPSDZrmi_Intk: case X86::VCMPSDZrri_Intk:
+ case X86::VCMPSSZrmi_Intk: case X86::VCMPSSZrri_Intk:
+ case X86::VCMPPDZ128rmbi: case X86::VCMPPDZ128rmbik:
+ case X86::VCMPPDZ256rmbi: case X86::VCMPPDZ256rmbik:
+ case X86::VCMPPDZrmbi: case X86::VCMPPDZrmbik:
+ case X86::VCMPPSZ128rmbi: case X86::VCMPPSZ128rmbik:
+ case X86::VCMPPSZ256rmbi: case X86::VCMPPSZ256rmbik:
+ case X86::VCMPPSZrmbi: case X86::VCMPPSZrmbik:
+ case X86::VCMPPDZrrib: case X86::VCMPPDZrribk:
+ case X86::VCMPPSZrrib: case X86::VCMPPSZrribk:
+ case X86::VCMPSDZrrib_Int: case X86::VCMPSDZrrib_Intk:
+ case X86::VCMPSSZrrib_Int: case X86::VCMPSSZrrib_Intk:
+ case X86::VCMPPHZ128rmi: case X86::VCMPPHZ128rri:
+ case X86::VCMPPHZ256rmi: case X86::VCMPPHZ256rri:
+ case X86::VCMPPHZrmi: case X86::VCMPPHZrri:
+ case X86::VCMPSHZrmi: case X86::VCMPSHZrri:
+ case X86::VCMPSHZrmi_Int: case X86::VCMPSHZrri_Int:
+ case X86::VCMPPHZ128rmik: case X86::VCMPPHZ128rrik:
+ case X86::VCMPPHZ256rmik: case X86::VCMPPHZ256rrik:
+ case X86::VCMPPHZrmik: case X86::VCMPPHZrrik:
+ case X86::VCMPSHZrmi_Intk: case X86::VCMPSHZrri_Intk:
+ case X86::VCMPPHZ128rmbi: case X86::VCMPPHZ128rmbik:
+ case X86::VCMPPHZ256rmbi: case X86::VCMPPHZ256rmbik:
+ case X86::VCMPPHZrmbi: case X86::VCMPPHZrmbik:
+ case X86::VCMPPHZrrib: case X86::VCMPPHZrribk:
+ case X86::VCMPSHZrrib_Int: case X86::VCMPSHZrrib_Intk:
if (Imm >= 0 && Imm <= 31) {
OS << '\t';
printCMPMnemonic(MI, /*IsVCMP*/true, OS);
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp
index 9368de62817b3d..9f0b5f32df20a0 100644
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -2198,7 +2198,7 @@ bool X86FastISel::X86FastEmitSSESelect(MVT RetVT, const Instruction *I) {
const TargetRegisterClass *VK1 = &X86::VK1RegClass;
unsigned CmpOpcode =
- (RetVT == MVT::f32) ? X86::VCMPSSZrr : X86::VCMPSDZrr;
+ (RetVT == MVT::f32) ? X86::VCMPSSZrri : X86::VCMPSDZrri;
Register CmpReg = fastEmitInst_rri(CmpOpcode, VK1, CmpLHSReg, CmpRHSReg,
CC);
@@ -2228,7 +2228,7 @@ bool X86FastISel::X86FastEmitSSESelect(MVT RetVT, const Instruction *I) {
// instructions as the AND/ANDN/OR sequence due to register moves, so
// don't bother.
unsigned CmpOpcode =
- (RetVT == MVT::f32) ? X86::VCMPSSrr : X86::VCMPSDrr;
+ (RetVT == MVT::f32) ? X86::VCMPSSrri : X86::VCMPSDrri;
unsigned BlendOpcode =
(RetVT == MVT::f32) ? X86::VBLENDVPSrr : X86::VBLENDVPDrr;
@@ -2242,8 +2242,8 @@ bool X86FastISel::X86FastEmitSSESelect(MVT RetVT, const Instruction *I) {
} else {
// Choose the SSE instruction sequence based on data type (float or double).
static const uint16_t OpcTable[2][4] = {
- { X86::CMPSSrr, X86::ANDPSrr, X86::ANDNPSrr, X86::ORPSrr },
- { X86::CMPSDrr, X86::ANDPDrr, X86::ANDNPDrr, X86::ORPDrr }
+ { X86::CMPSSrri, X86::ANDPSrr, X86::ANDNPSrr, X86::ORPSrr },
+ { X86::CMPSDrri, X86::ANDPDrr, X86::ANDNPDrr, X86::ORPDrr }
};
const uint16_t *Opc = nullptr;
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td
index a76561f092c349..43a40f5e691ea3 100644
--- a/llvm/lib/Target/X86/X86InstrAVX512.td
+++ b/llvm/lib/Target/X86/X86InstrAVX512.td
@@ -1937,58 +1937,58 @@ defm VPBLENDMW : blendmask_bw<0x66, "vpblendmw", SchedWriteVarBlend,
multiclass avx512_cmp_scalar<X86VectorVTInfo _, SDNode OpNode, SDNode OpNodeSAE,
PatFrag OpNode_su, PatFrag OpNodeSAE_su,
X86FoldableSchedWrite sched> {
- defm rr_Int : AVX512_maskable_cmp<0xC2, MRMSrcReg, _,
- (outs _.KRC:$dst),
- (ins _.RC:$src1, _.RC:$src2, u8imm:$cc),
- "vcmp"#_.Suffix,
- "$cc, $src2, $src1", "$src1, $src2, $cc",
- (OpNode (_.VT _.RC:$src1), (_.VT _.RC:$src2), timm:$cc),
- (OpNode_su (_.VT _.RC:$src1), (_.VT _.RC:$src2),
- timm:$cc)>, EVEX, VVVV, VEX_LIG, Sched<[sched]>, SIMD_EXC;
+ defm rri_Int : AVX512_maskable_cmp<0xC2, MRMSrcReg, _,
+ (outs _.KRC:$dst),
+ (ins _.RC:$src1, _.RC:$src2, u8imm:$cc),
+ "vcmp"#_.Suffix,
+ "$cc, $src2, $src1", "$src1, $src2, $cc",
+ (OpNode (_.VT _.RC:$src1), (_.VT _.RC:$src2), timm:$cc),
+ (OpNode_su (_.VT _.RC:$src1), (_.VT _.RC:$src2), timm:$cc)>,...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/84496
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