[llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)

[Alfie Richards via llvm-commits]

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@@ -1747,4 +1747,5 @@ def ARM : Target {
   let AssemblyParsers = [ARMAsmParser];
   let AssemblyParserVariants = [ARMAsmParserVariant];
   let AllowRegisterRenaming = 1;
+  let PreferSmallerInstructions= true;
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AlfieRichardsArm wrote:

Ah yeah that would make sense, I am happy to move it. 

https://github.com/llvm/llvm-project/pull/83436