[llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)

[Sergei Barannikov via llvm-commits]

================
@@ -76,8 +76,8 @@ unsigned PseudoLoweringEmitter::addDagOperandMapping(
   unsigned OpsAdded = 0;
   for (unsigned i = 0, e = Dag->getNumArgs(); i != e; ++i) {
     if (DefInit *DI = dyn_cast<DefInit>(Dag->getArg(i))) {
-      // Physical register reference. Explicit check for the special case
-      // "zero_reg" definition.
+      // Physical register reference.
+      // Explicit check for the special case "zero_reg" definition.
----------------
s-barannikov wrote:

Unrelated change.

https://github.com/llvm/llvm-project/pull/83436