[llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)

[Sergei Barannikov via llvm-commits]

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@@ -196,7 +199,7 @@ void PseudoLoweringEmitter::evaluateExpansion(Record *Rec) {
     SourceOperands[SourceInsn.Operands[i].Name] = i;
 
   LLVM_DEBUG(dbgs() << "  Operand mapping:\n");
-  for (unsigned i = 0, e = Insn.Operands.size(); i != e; ++i) {
+  for (unsigned i = 0, e = Dag->getNumArgs(); i != e; ++i) {
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s-barannikov wrote:

Changes in this file seem to address a separate (though related) issue. Can you file a separate PR for this? These changes should be easily testable, a couple of tests would help understand the changes. See llvm/test/TableGen/pseudo-inst-expansion.td for example.

https://github.com/llvm/llvm-project/pull/83436