[llvm] [AArch64] Support scalable offsets with isLegalAddressingMode (PR #83255)

[Matt Arsenault via llvm-commits]

================
@@ -1531,6 +1531,10 @@ bool SITargetLowering::isLegalMUBUFAddressingMode(const AddrMode &AM) const {
 bool SITargetLowering::isLegalAddressingMode(const DataLayout &DL,
                                              const AddrMode &AM, Type *Ty,
                                              unsigned AS, Instruction *I) const {
+  // No scalable offsets allowed.
+  if (AM.OffsetIsScalable)
+    return false;
+
----------------
arsenm wrote:

shouldn't need to go through all the targets with no scalable vectors

https://github.com/llvm/llvm-project/pull/83255