[llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)

[via llvm-commits]

github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


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git-clang-format --diff f6557783007377a80a4dc0c5e3c8e2513ed36b2f 8724b327c830ec9caa6ab75f6a21f1da49fcb641 -- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 5b1be2705d..4eedca0bc2 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -272,7 +272,7 @@ static bool isZeroingInactiveLanes(SDValue Op) {
   // Skip bitcasts nodes
   while (Op->getOpcode() == ISD::BITCAST)
     Op = Op->getOperand(0);
-    
+
   switch (Op.getOpcode()) {
   default:
     return false;

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https://github.com/llvm/llvm-project/pull/83001