[llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)

[Luke Lau via llvm-commits]

https://github.com/lukel97 commented:

Makes sense to me.

As a side note this reminds me of https://github.com/llvm/llvm-project/pull/69290, but I'm not sure where it stands with the vector calling convention now 

https://github.com/llvm/llvm-project/pull/82967