[llvm] [TTI][RISCV]Improve costs for whole vector reg extract/insert. (PR #80164)

[Luke Lau via llvm-commits]

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@@ -442,6 +454,9 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
     return LT.first *
            getRISCVInstructionCost(RISCV::VSLIDEDOWN_VI, LT.second, CostKind);
   case TTI::SK_InsertSubvector:
+    if (Index == 0 && any_of(Args, UndefValue::classof))
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lukel97 wrote:

Do we need to check that Args isn't empty?

https://github.com/llvm/llvm-project/pull/80164