[llvm] [CodeGen] [ARM] Make RISC-V Init Undef Pass Target Independent and add support for the ARM Architecture. (PR #77770)

[via llvm-commits]

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@@ -327,6 +327,14 @@ class TargetSubtargetInfo : public MCSubtargetInfo {
 
   /// Get the list of MacroFusion predicates.
   virtual std::vector<MacroFusionPredTy> getMacroFusions() const { return {}; };
+
+  /// supportsInitUndef is used to determine if an architecture supports
+  /// the Init Undef Pass. By default, it is assumed that it will not support
+  /// the pass, with architecture specific overrides providing the information
+  /// where they are implemented. This was originally used in RISC-V's Init
+  /// Undef pass but has been moved to be a virtual function when the pass was
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ostannard wrote:

Nit: You don't need to talk about the history here, this should just describe the current state of the code.

https://github.com/llvm/llvm-project/pull/77770