[llvm] [TTI][RISCV]Improve costs for fixed vector whole reg extract/insert. (PR #80164)

[Philip Reames via llvm-commits]

https://github.com/preames commented:

I'd encourage you to split off a change to handle only the Index == 0 case.  It should be simple, but that's the value.  :)

https://github.com/llvm/llvm-project/pull/80164