[llvm] [AArch64] Add FeatureFuseAdrpAdd for Ampere1/1A (PR #81293)

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llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-aarch64

Author: Philipp Tomsich (ptomsich)

<details>
<summary>Changes</summary>

Both Ampere1 and Ampere1A support fusion of ADRP+ADD.
This adds the missing feature to enable fusion-aware scheduling for this case.

---
Full diff: https://github.com/llvm/llvm-project/pull/81293.diff


1 Files Affected:

- (modified) llvm/lib/Target/AArch64/AArch64.td (+2) 


``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td
index 02fb01caf7e80..155edaf7e194b 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -1349,6 +1349,7 @@ def TuneAmpere1 : SubtargetFeature<"ampere1", "ARMProcFamily", "Ampere1",
                                    "Ampere Computing Ampere-1 processors", [
                                    FeaturePostRAScheduler,
                                    FeatureFuseAES,
+                                   FeatureFuseAdrpAdd,
                                    FeatureAddrLSLFast,
                                    FeatureALULSLFast,
                                    FeatureAggressiveFMA,
@@ -1364,6 +1365,7 @@ def TuneAmpere1A : SubtargetFeature<"ampere1a", "ARMProcFamily", "Ampere1A",
                                     "Ampere Computing Ampere-1A processors", [
                                     FeaturePostRAScheduler,
                                     FeatureFuseAES,
+                                    FeatureFuseAdrpAdd,
                                     FeatureAddrLSLFast,
                                     FeatureALULSLFast,
                                     FeatureAggressiveFMA,

``````````

</details>


https://github.com/llvm/llvm-project/pull/81293