[llvm] [RISCV][GISEL] Add IRTranslation for insertelement with scalable vector type (PR #80377)

[Craig Topper via llvm-commits]

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@@ -0,0 +1,1941 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
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topperc wrote:

Are we only testing inserting into element 0?

https://github.com/llvm/llvm-project/pull/80377