[llvm] [SelectionDAG] Use getRegisterType instead of getTypeToTransformTo in ComputePHILiveOutRegInfo. (PR #80773)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-selectiondag

Author: Craig Topper (topperc)

<details>
<summary>Changes</summary>

Since we used getNumRegisters right before this, I think this is the correct interface we should be using here.

I'm experimenting with making i32 legal on RISC-V 64, but using i64 for the register type between basic blocks. This was one of the first issues I found trying to do that.

---
Full diff: https://github.com/llvm/llvm-project/pull/80773.diff


1 Files Affected:

- (modified) llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp (+1-1) 


``````````diff
diff --git a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
index 5926a60581112..6cf5408591523 100644
--- a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
@@ -431,7 +431,7 @@ void FunctionLoweringInfo::ComputePHILiveOutRegInfo(const PHINode *PN) {
 
   if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)
     return;
-  IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);
+  IntVT = TLI->getRegisterType(PN->getContext(), IntVT);
   unsigned BitWidth = IntVT.getSizeInBits();
 
   auto It = ValueMap.find(PN);

``````````

</details>


https://github.com/llvm/llvm-project/pull/80773