[llvm] [SelectionDAG] Use getRegisterType instead of getTypeToTransformTo in ComputePHILiveOutRegInfo. (PR #80773)

[Craig Topper via llvm-commits]

https://github.com/topperc created https://github.com/llvm/llvm-project/pull/80773

Since we used getNumRegisters right before this, I think this is the correct interface we should be using here.

I'm experimenting with making i32 legal on RISC-V 64, but using i64 for the register type between basic blocks. This was one of the first issues I found trying to do that.

>From 6ef9e506c14ec6b0178e29cc7744ed2cbe1cd7e0 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Mon, 5 Feb 2024 16:40:46 -0800
Subject: [PATCH] [SelectionDAG] Use getRegisterType instead of
 getTypeToTransformTo in ComputePHILiveOutRegInfo.

Since we used getNumRegisters right before this, I think this is
the correct interface we should be using here.

I'm experimenting with making i32 legal on RISC-V 64, but using
i64 for the register type between basic blocks. This was one of
the first issues I found trying to do that.
---
 llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
index 5926a60581112..6cf5408591523 100644
--- a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
@@ -431,7 +431,7 @@ void FunctionLoweringInfo::ComputePHILiveOutRegInfo(const PHINode *PN) {
 
   if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)
     return;
-  IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);
+  IntVT = TLI->getRegisterType(PN->getContext(), IntVT);
   unsigned BitWidth = IntVT.getSizeInBits();
 
   auto It = ValueMap.find(PN);