[llvm] [CodeGen] [ARM] Make RISC-V Init Undef Pass Target Independent and add support for the ARM Architecture. (PR #77770)

[Jack Styles via llvm-commits]

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@@ -1179,6 +1179,8 @@ void CodeGenPassBuilder<Derived>::addOptimizedRegAlloc(
     AddMachinePass &addPass) const {
   addPass(DetectDeadLanesPass());
 
+  addPass(InitUndefPass())
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Stylie777 wrote:

Updated

https://github.com/llvm/llvm-project/pull/77770