[llvm] c82a645 - [X86][NFC] Simplify the code for memory fold

Shengchen Kan via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 31 21:43:50 PST 2024


Author: Shengchen Kan
Date: 2024-02-01T13:43:25+08:00
New Revision: c82a645ef2421c29b5e0000e981b90dc9a1e1137

URL: https://github.com/llvm/llvm-project/commit/c82a645ef2421c29b5e0000e981b90dc9a1e1137
DIFF: https://github.com/llvm/llvm-project/commit/c82a645ef2421c29b5e0000e981b90dc9a1e1137.diff

LOG: [X86][NFC] Simplify the code for memory fold

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86InstrInfo.cpp
    llvm/utils/TableGen/X86FoldTablesEmitter.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index a90c79cb3220d..d0394d6f49145 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -7309,10 +7309,6 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
 
   if (I != nullptr) {
     unsigned Opcode = I->DstOp;
-    bool FoldedLoad =
-        isTwoAddrFold || (OpNum == 0 && I->Flags & TB_FOLDED_LOAD) || OpNum > 0;
-    bool FoldedStore =
-        isTwoAddrFold || (OpNum == 0 && I->Flags & TB_FOLDED_STORE);
     if (Alignment <
         Align(1ULL << ((I->Flags & TB_ALIGN_MASK) >> TB_ALIGN_SHIFT)))
       return nullptr;
@@ -7324,7 +7320,7 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
       // Check if it's safe to fold the load. If the size of the object is
       // narrower than the load width, then it's not.
       // FIXME: Allow scalar intrinsic instructions like ADDSSrm_Int.
-      if (FoldedLoad && Size < RCSize) {
+      if ((I->Flags & TB_FOLDED_LOAD) && Size < RCSize) {
         // If this is a 64-bit load, but the spill slot is 32, then we can do
         // a 32-bit load which is implicitly zero-extended. This likely is
         // due to live interval analysis remat'ing a load from stack slot.
@@ -7338,7 +7334,7 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
       // For stores, make sure the size of the object is equal to the size of
       // the store. If the object is larger, the extra bits would be garbage. If
       // the object is smaller we might overwrite another object or fault.
-      if (FoldedStore && Size != RCSize)
+      if ((I->Flags & TB_FOLDED_STORE) && Size != RCSize)
         return nullptr;
     }
 

diff  --git a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
index 7ea02ecba324c..44c2817e1b5d6 100644
--- a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
+++ b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
@@ -452,8 +452,6 @@ void X86FoldTablesEmitter::addEntryWithFlags(FoldTable &Table,
          "Override entry unexpectedly");
   X86FoldTableEntry Result = X86FoldTableEntry(RegInst, MemInst);
   Record *RegRec = RegInst->TheDef;
-  Record *MemRec = MemInst->TheDef;
-
   Result.NoReverse = S & TB_NO_REVERSE;
   Result.NoForward = S & TB_NO_FORWARD;
   Result.FoldLoad = S & TB_FOLDED_LOAD;
@@ -464,21 +462,6 @@ void X86FoldTablesEmitter::addEntryWithFlags(FoldTable &Table,
     return;
   }
 
-  // Only table0 entries should explicitly specify a load or store flag.
-  if (&Table == &Table0) {
-    unsigned MemInOpsNum = MemRec->getValueAsDag("InOperandList")->getNumArgs();
-    unsigned RegInOpsNum = RegRec->getValueAsDag("InOperandList")->getNumArgs();
-    // If the instruction writes to the folded operand, it will appear as an
-    // output in the register form instruction and as an input in the memory
-    // form instruction.
-    // If the instruction reads from the folded operand, it well appear as in
-    // input in both forms.
-    if (MemInOpsNum == RegInOpsNum)
-      Result.FoldLoad = true;
-    else
-      Result.FoldStore = true;
-  }
-
   Record *RegOpRec = RegInst->Operands[FoldedIdx].Rec;
   Record *MemOpRec = MemInst->Operands[FoldedIdx].Rec;
 
@@ -575,6 +558,11 @@ void X86FoldTablesEmitter::updateTables(const CodeGenInstruction *RegInst,
     return;
   }
 
+  // Only table0 entries should explicitly specify a load or store flag.
+  // If the instruction writes to the folded operand, it will appear as
+  // an output in the register form instruction and as an input in the
+  // memory form instruction. If the instruction reads from the folded
+  // operand, it will appear as in input in both forms.
   if (MemInSize == RegInSize && MemOutSize == RegOutSize) {
     // Load-Folding cases.
     // If the i'th register form operand is a register and the i'th memory form
@@ -590,7 +578,8 @@ void X86FoldTablesEmitter::updateTables(const CodeGenInstruction *RegInst,
         switch (I) {
         case 0:
           assert(!IsBroadcast && "BroadcastTable0 needs to be added");
-          addEntryWithFlags(Table0, RegInst, MemInst, S, 0, IsManual);
+          addEntryWithFlags(Table0, RegInst, MemInst, S | TB_FOLDED_LOAD, 0,
+                            IsManual);
           return;
         case 1:
           IsBroadcast
@@ -628,7 +617,8 @@ void X86FoldTablesEmitter::updateTables(const CodeGenInstruction *RegInst,
     if (isRegisterOperand(RegOpRec) && isMemoryOperand(MemOpRec) &&
         getRegOperandSize(RegOpRec) == getMemOperandSize(MemOpRec)) {
       assert(!IsBroadcast && "Store can not be broadcast");
-      addEntryWithFlags(Table0, RegInst, MemInst, S, 0, IsManual);
+      addEntryWithFlags(Table0, RegInst, MemInst, S | TB_FOLDED_STORE, 0,
+                        IsManual);
     }
   }
 }


        


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