[llvm] [TTI][RISCV]Improve costs for fixed vector whole reg extract/insert. (PR #80164)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 31 08:57:37 PST 2024
topperc wrote:
Don't we need to know the exact vlen to know where register boundaries are?
https://github.com/llvm/llvm-project/pull/80164
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