[llvm] [RISCV] Re-format RISCVFeatures.td so it doesn't look like AssemblerPredicate is an operand to Predicate. (PR #79076)
Wang Pengcheng via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 23 01:17:45 PST 2024
================
@@ -107,23 +107,23 @@ def FeatureStdExtZihpm
def FeatureStdExtZimop : SubtargetFeature<"experimental-zimop", "HasStdExtZimop", "true",
"'Zimop' (May-Be-Operations)">;
def HasStdExtZimop : Predicate<"Subtarget->hasStdExtZimop()">,
- AssemblerPredicate<(all_of FeatureStdExtZimop),
- "'Zimop' (May-Be-Operations)">;
+ AssemblerPredicate<(all_of FeatureStdExtZimop),
+ "'Zimop' (May-Be-Operations)">;
def FeatureStdExtZicfilp
: SubtargetFeature<"experimental-zicfilp", "HasStdExtZicfilp", "true",
"'Zicfilp' (Landing pad)">;
def HasStdExtZicfilp : Predicate<"Subtarget->hasStdExtZicfilp()">,
- AssemblerPredicate<(all_of FeatureStdExtZicfilp),
- "'Zicfilp' (Landing pad)">;
+ AssemblerPredicate<(all_of FeatureStdExtZicfilp),
+ "'Zicfilp' (Landing pad)">;
----------------
wangpc-pp wrote:
Missing a space here.
https://github.com/llvm/llvm-project/pull/79076
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