[llvm] [AIX][TLS] Optimize the small local-exec access sequence for non-zero offsets (PR #71485)

[via llvm-commits]

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@@ -1523,19 +1558,50 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
     EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::EnforceIEIO));
     return;
   }
+  case PPC::LBZ:
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diggerlin wrote:

just curiously: 
tls  addi, or load/stores with thread-pointer are only in 64 bits, doese  PPC:LBZ is 32bits? 

same as :LHA  etc..

https://github.com/llvm/llvm-project/pull/71485